Slew rate controlling method and system for output data
AssigneeElpida Memory, Inc.
InventorsTomoyuki Shibata, Kanji Oishi
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AssigneeElpida Memory, Inc.
InventorsTomoyuki Shibata, Kanji Oishi
Estimating the term…
A slew rate controlling system for output data is provided which is capable of improving an output data window even when change in a potential difference between a first power supply (VDD) to be used for outputting and a second power supply (VDDQ) to be used internally occurs. The slew rate controlling system is achieved by using a VDD-VDDQ potential difference detecting circuit to detect a decrease in a potential difference between the first power supply (VDD) and the second power supply (VDDQ) and to produce a first signal with specified timing and to detect an increase in a potential difference between the first power supply (VDD) and the second power supply (VDDQ) and to produce a second signal and by using a slew rate controlling circuit to exert control, when the first signal is significant, to enlarge a transition speed in a fall of output data and to exert control, when the second signal is significant, to enlarge the transition speed in a rise of output data and to produce output data.
A slew rate controlling system for output data, said system comprising:
A slew rate controlling system for output data, said system comprising:
A slew rate controlling system for output data, said system comprising:
A slew rate controlling system for output data, said system comprising:
A slew rate controlling method for output data, said system comprising:
Dependencies are inferred from the claim text.