Method of fabricating split gate flash memory device

A method of fabricating a split gate flash memory device, comprising the steps of:

• forming a first gate pattern covered with a cap layer on a semiconductor substrate in an active area;
• forming an etchant-resistant layer covering one side of the first gate pattern, the etchant-resistant layer extending to a surface of the substrate to cover one confronting side of a neighboring first gate pattern in the active area;
• forming an insulating layer on an exposed surface of the first gate pattern;
• forming a second gate pattern covering the first gate pattern and the insulating layer, the second gate pattern not overlapping the etch-resistant layer;
• removing the etch-resistant layer;
• and
• forming a pair of doped regions in the substrate aligned with the first and second gate patterns.

A method of fabricating a split gate flash memory device comprising:

• a step for forming a pair of first gate patterns on a semiconductor substrate in an active area a prescribed distance from each other;
• a step for forming an etch-resistant layer pattern covering confronting sidewalls of the pair of first gate patterns and covering a surface of the substrate corresponding to the prescribed distance;
• a step for forming an insulating layer on exposed surfaces of the pair of first gates;
• a step for forming a pair of second gate patterns over the pair of first gate patterns, respectively, not overlapping the etch-resistant layer;
• a step for removing the etch-resistant layer;
• and
• a step for forming doped regions in the substrate aligned with the pair of first and second gate patterns, respectively.