Methods of forming devices, constructions and systems comprising thyristors

A method of forming a semiconductor-on-insulator construction, comprising:

• providing a substrate;
• forming an insulator layer over the substrate;
• forming a crystalline layer comprising silicon and germanium over the insulator layer;
• forming a transistor device supported by the crystalline layer, the transistor device comprising a gate and an active region proximate the gate;
• the active region including a channel region;
• at least a portion of the active region being within the crystalline layer;
• an entirety of the active region within the crystalline layer being within a single crystal of the crystalline layer;
• the transistor device comprising a pair of source/drain regions;
• and
• forming a thyristor electrically connected within one of the source/drain regions of the transistor device.

A method of forming a memory device, comprising:

• forming a transistor having a gate supported by a crystalline layer and having a pair of source/drain regions proximate the gate;
• the crystalline layer being less than or equal to about 2000 Å thick;
• the crystalline layer comprising a material which includes silicon and germanium;
• the transistor having an active region;
• at least a portion of the active region being within the material;
• the active region within the material being contained within a single crystal of the material;
• and
• forming a thyristor electrically connected with one of the source/drain regions.

A method of forming an electronic system, comprising:

• forming an array of memory cells, at least some of the memory cells including transistors and thyristors;
• the transistors having gates supported by a crystalline layer;
• the crystalline layer being less than or equal to about 2000 Å thick;
• the crystalline layer comprising a material which includes silicon and germanium;
• the at least some of the transistors having active regions within the crystalline layer;
• each active region within the crystalline layer including only one crystal of said material;
• forming addressing circuitry coupled to the array of memory cells for accessing individual memory cells in the array of memory cells;
• and
• forming a read circuit coupled to the memory cell array for reading data from memory cells in the array of memory cells.