Multi-rate, multi-protocol, multi-port line interface for a multiservice switching platform

A line card, the line card being arranged to be incorporated into one of a multi-slot broadband digital cross-connect system or a multiservice provisioning platform, the line card comprising:

• a plurality of ports, the plurality of ports including a first port, the first port being arranged to receive a signal, the signal being one of an OC-3 signal, an OC-12 signal, an OC-48 signal, and a Gigabit Ethernet signal;
• a plurality of devices, the plurality of devices being arranged to receive the signal and to process the signal to create an STS-48 SONET signal, wherein the plurality of devices includes
• a multi-rate serialize-deserialize device which is arranged to accept the signal in a serialized format,
• a first device which includes section and line termination functionality in the creation of the STS-48 SONET signal,
• a second device, the second device being arranged to map the Gigabit Ethernet signal to create a mapped signal with a SONET payload, and
• a switch, the switch being arranged to receive the signal serially from the multi-rate serialize-deserialize device and to provide the signal to one of the first device and the second device, wherein when the switch provides the signal to the second device, the second device returns the mapped signal to the switch which passes the mapped signal to the first device;
• and
• a backplane, the backplane being arranged to receive the STS-48 SONET signal from the plurality of devices.

A line card, the line card being arranged to be included in a system on a network, the line card comprising:

• at least one port arranged to receive a signal of a first format;
• a first module, the first module being arranged to receive the signal of the first format serially from the port, the first module further being arranged to determine when the first format is a desired format,
• wherein when it is determined that the first format is not the desired format, the first module is still further arranged to determine when to map the signal of the first format into a signal of the desired format using the first module when it is determined that the signal of the first format is to be mapped into the signal of the desired format using the first module;
• and
• a second module, the second module being arranged to receive the signal of the first format serially from the first module when it is determined that the signal is not to be mapped into the signal of the second format using the first module, the second module further being arranged to receive the signal of the first format serially from the first module when it is determined that the first format is the desired format, the second module further being arranged to receive the signal of the desired format serially from the first module when the signal of the first format is mapped into the signal of the desired format using the first module,
• wherein the second module is still further arranged to determine when to map the signal of the first format into the signal of the desired format using the second module when it is determined that the signal of the first format is to be mapped into the signal of the desired format using the second module.