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US 6,948,094 B2Granted
Method of correcting a machine check error
AssigneeIntel Corporation
InventorsLen Schultz, Nhon Toai Quach, Dean Mulla, Jim Hays, John Fu
Life of this patent
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Abstract
Processor implementation-specific instructions save a processor state in a system memory and attempt to correct the error. Control is then transferred to processor-independent instructions. Control is returned to the processor implementation-specific instructions which then return to an interrupted context of the processor by restoring the processor state.
Claims20
A method comprising:
- using processor implementation-specific instructions to save a processor state in a system memory when a machine check error is generated by a processor;
- attempting to correct the error using processor implementation-specific instructions;
- transferring control to processor-independent instructions;
- receiving control from processor-independent instructions;
- and
- returning to an interrupted context of the processor by restoring the processor state;
- wherein the processor implementation-specific instructions depend on the specific architecture of the processor to function correctly and the processor-independent instructions function correctly regardless of the specific architecture of the processor.
4 more elements
A machine-readable medium that provides instructions that, if executed by a processor, will cause the processor to perform operations comprising:
- using processor implementation-specific instructions to save a processor state in a system memory when a machine check error is generated by the processor;
- attempting to correct the error using processor implementation-specific instructions;
- transferring control to processor-independent instructions;
- receiving control from processor-independent instructions;
- and
- returning to an interrupted context of the processor by restoring the processor state;
- wherein the processor implementation-specific instructions depend on the specific architecture of the processor to function correctly and the processor-independent instructions function correctly regardless of the specific architecture of the processor.
4 more elements
A central processing unit (CPU) comprising:
- a processor;
- a first machine-readable medium coupled to the processor, the first machine-readable medium including processor implementation-specific instructions dependent on the specific architecture of the processor to function correctly that, if executed by the processor, will cause the processor to perform operations including
- saving a processor state in a system memory and attempting to correct an error when a machine check error is generated by the processor, and
- receiving control and returning to the interrupted context of the processor by restoring the state of the processor when the error is determined to have been corrected;
- a second machine-readable medium coupled to the processor, the second machine-readable medium including only processor implementation-independent instructions not dependent on the specific architecture of the processor to function correctly that, if executed by the processor, will cause the processor to perform operations including
- receiving control from the first machine-readable medium;
- determining if the error has been corrected;
- transferring control to the first machine-readable medium if the error has been corrected.
5 more elements
Dependencies are inferred from the claim text.