Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems

In an enclosed package having an electrical connector carried thereby for interfacing with computer system signals that address disk memory by head number, cylinder number, and specific ones of a plurality of sectors that each contain a predetermined number of bytes, a mass storage system, comprising:

• a plurality of flash EEPROM integrated circuit chips containing a large number of non-volatile memory cells arranged in physical quadrants on the chips and having separately addressable sectors of cells within the quadrants, the individual sectors having enough cells to store said predetermined number of bytes, and
• a controller connected between said connector and said plurality of flash EEPROM integrated circuit chips in a manner to allow data to be written into said chips and to be read from said chips when a computer system is connected with said connector, said controller including means responsive to said computer system signals that address disk memory for addressing said plurality of EEPROM chips by corresponding chip numbers, quadrants and numbers of sectors, whereby the package of integrated circuit memory is addressed by a computer system as is disk storage memory.

In an enclosed rectangularly shaped computer memory system that is less than 5.5 centimeters in width, less than 9.0 centimeters in length and less than 6.0 millimeters in thickness, and having an electrical connector along one side thereof, a combination comprising a plurality of substantially identical flash EEPROM integrated circuit chips, and a controller circuit interconnected between said electrical connector and said plurality of flash EEPROM integrated circuit chips, wherein the transfer of data between said electrical connector and said plurality of flash EEPROM integrated circuit chips includes a serial transfer portion.

In an enclosed package having an electrical connector carried thereby for interfacing with computer system signals including computer address signals that address disk memory by head number, cylinder number, and specific ones of a plurality of sectors that each contain a predetermined number of bytes, a mass storage system, comprising:

• a plurality of flash EEPROM integrated circuit chips containing a large number of non-volatile memory cells arranged in physical quadrants on the chips and having separately addressable sectors of cells within the quadrants, the individual sectors having enough cells to store said predetermined number of bytes, and
• a controller connected between said connector and said plurality of flash EEPROM integrated circuit chips in a manner to allow data to be written into said chips and to be read from said chips when a computer system is connected with said connector, said controller including means responsive to said computer address signals for addressing said plurality of EEPROM chips by corresponding chip numbers, quadrants and numbers of sectors, whereby the package of integrated circuit memory is addressed by a computer system as is disk storage memory, wherein the transfer of said data between said computer system and said plurality of EEPROM chips includes a serial transfer portion.