Drive control system for a fiber-based plasma display

A plasma display device comprising:

• at least one fiber structure including a conductive electrode inside or on a surface of the fiber;
• wherein an image on the display is addressed using a write address waveform which:
• removes a charge from each subpixel, thereby turning each subpixel OFF;
• and
• adds charge to at least one subpixel by applying a voltage to its corresponding electrodes, thereby turning said at least one subpixel ON.

A plasma display device comprising:

• at least one fiber structure including a pair of barrier ribs that define a plasma channel, at least one wire address electrode inside or on a surface of said fiber, and a phosphor layer coating on said surface of said plasma channel;
• and
• a glass plate with patterned sustain electrodes;
• wherein an image on the display is addressed using an erase address waveform which:
• stores a charge over said sustain electrodes on each subpixel to turn each subpixel ON;
• and
• selectively removes said charge from at least one subpixel by applying an erase pulse to its corresponding wire address electrode, thereby turning said at least one subpixel OFF.

A plasma display device comprising:

• at least one fiber structure including a pair of barrier ribs that define a plasma channel, at least one wire address electrode inside or on a surface of said fiber, and a phosphor layer coating on said surface of said plasma channel;
• and
• a glass plate with patterned sustain electrodes;
• wherein an image on the display is addressed using a write address waveform which:
• removes a charge from each subpixel, thereby turning each subpixel OFF;
• and
• adds charge to at least one subpixel by applying a voltage to its corresponding sustain electrodes and wire address electrode, thereby turning said at least one subpixel ON.

A plasma display device comprising:

• at least one first fiber structure including a pair of barrier ribs that define a plasma channel, at least one wire address electrode inside or on a surface of said fiber, and a phosphor layer coating on said surface of said plasma channel;
• and
• at least one second fiber structure including at least one wire sustain electrode located near a surface of said first fiber;
• wherein an image on the display is addressed using an erase address waveform which:
• stores a charge over said sustain electrodes on each subpixel to turn each subpixel ON;
• and
• selectively removes said charge from at least one subpixel by applying an erase pulse to its corresponding wire address electrode, thereby turning said at least one subpixel OFF.

A plasma display device comprising:

• at least one fiber structure including a pair of barrier ribs that define a plasma channel, at least one wire address electrode inside or on a surface of said fiber, and a phosphor layer coating on said surface of said plasma channel;
• and
• at least one second fiber structure including at least one wire sustain electrode located near a surface of said first fiber;
• and
• wherein an image on the display is addressed using a write address waveform which:
• removes a charge from each subpixel, thereby turning each subpixel OFF;
• and
• adds charge to at least one subpixel by applying a voltage to its corresponding wire sustain electrodes and wire address electrode, thereby turning said at least one subpixel ON.

A surface discharge plasma display device, comprising:

• a first glass plate comprising a plurality of sustain electrodes, a thin dielectric layer covering said sustain electrodes and an emissive film covering said dielectric layer;
• a fiber array including a plurality of fibers, each bottom fiber including a pair of barrier ribs that define a plasma channel, at least one wire address electrode located near a surface of said plasma channel, and a phosphor layer coating on said surface of said plasma channel;
• and
• a second glass plate, wherein said fiber array is sandwiched between said first glass plate and said second glass plate;
• said plasma display being hermetically sealed with a glass frit around a perimeter of the first and second glass plates and said wire address electrodes are brought out through said glass frit for direct connection to a drive control system that generates a plurality of voltage waveforms, which address an image on the display;
• wherein said waveforms are selected from the group consisting of:
• a) an erase address waveform;
• b) a write address waveform;
• and
• c) a ramped voltage address waveform.

A surface discharge plasma display device, comprising:

• two glass plates sandwiched around first and second orthogonal arrays of fibers defining a structure of said display;
• said first fiber array including a plurality of top fibers, each top fiber including at least one pair of wire sustain electrodes located near a surface of said top fiber, said surface being covered by an emissive film;
• said second fiber array including a plurality of bottom fibers, each bottom fiber including a pair of barrier ribs that define a plasma channel, at least one wire address electrode located near a surface of said plasma channel, and a phosphor layer coating on said surface of said plasma channel;
• said plasma display being hermetically sealed around a perimeter of the glass plates with a glass flit and said pair of wire sustain electrodes and said wire address electrode are brought out through said glass fit for direct connection to a drive control system that generates a plurality of voltage waveforms, which address an image on the display;
• wherein said waveforms are selected from the group consisting of:
• a) an erase address waveform;
• b) a write address waveform;
• and
• c) a ramped voltage address waveform.

An electronic display comprising at least one fiber including at least one wire electrode wherein said wire electrode is brought out through a seal region for direct connection to a drive control system that generates a plurality of voltage waveforms, which address an image on the display;

• wherein said waveforms are selected from the group consisting of:
• a) an erase address waveform;
• b) a write address waveform;
• and
• c) a ramped voltage address waveform.