Non-volatile semiconductor memory with large erase blocks storing cycle counts
AssigneesSanDisk Corporation, Kabushiki Kaisha Toshiba
InventorsJian Chen, Tomoharu Tanaka
Life of this patent
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AssigneesSanDisk Corporation, Kabushiki Kaisha Toshiba
InventorsJian Chen, Tomoharu Tanaka
Estimating the term…
In a flash EEPROM system that is divided into separately erasable blocks of memory cells with multiple pages of user data being stored in each block, a count of the number of erase cycles that each block has endured is stored in one location within the block, such as in spare cells of only one page or distributed among header regions of multiple pages. The page or pages containing the block cycle count are initially read from each block that is being erased, the cycle count temporarily stored, the block erased and an updated cycle count is then written back into the block location. User data is then programmed into individual pages of the block as necessary. The user data is preferably stored in more than two states per memory cell storage element, in which case the cycle count can be stored in binary in a manner to speed up the erase process and reduce disturbing effects on the erased state that writing the updated cycle count can cause. An error correction code calculated from the cycle count may be stored with it, thereby allowing validation of the stored cycle count.
A method of operating a non-volatile memory having an array of memory cells organized into blocks of cells that are erasable together as a unit and which individually store a plurality of pages of user data, comprising:
A method of operating a non-volatile memory having an array of memory cells organized into blocks of cells that are erasable together as a unit and which individually store a plurality of pages of user data, comprising:
A method of operating a non-volatile memory having an array of memory cells organized into blocks of cells that are erasable together as a unit and which individually store a plurality of pages of user data, comprising:
A method of operating a non-volatile memory having an array of memory cells organized into blocks of cells that are erasable together as a unit and which individually store a plurality of pages of user data, comprising:
A method of operating a non-volatile memory having an array of memory cells organized into blocks of cells that are erasable together as a unit and which individually store a plurality of pages that individually contain at least 512 bytes of user data, comprising:
Dependencies are inferred from the claim text.