High speed sense amplifier for memory output
AssigneeProgrammable Microelectronics Corporation
InventorsShiou-Yu Alex Wang, Joo-Young Kim, Kyoung-Chon Jin
Life of this patent
Estimating the term…
Abstract
A sense amplifier circuit includes a latch circuit to enhance the speed of a sensing operation and to obviate the need for a latch circuit to capture the output value of the sense amplifier circuit. In one embodiment, first and second differential amplifiers provide a differential signal to the latch circuit. The high gain in the latch circuit resolves the differential signal to a logic signal, which is then provided to an output amplifier. In one embodiment, the differential signal is provided to the latch circuit after the differential signal across the input terminals of the first and second differential amplifiers exceeds a predetermined value.
Claims10
A sense amplifier receiving an input signal and a reference signal, comprising:
- a first differential amplifier and a differential second amplifier each receiving the input signal and the reference signal to provide a differential signal across output terminals of the first and second differential amplifiers, wherein the differential signal represents an amplified difference in voltage across the input signal and the reference signal;
- a latch circuit receiving the amplified differential signal to provide as output first and second logic signals, the first and second logic signal representing complementary logic values;
- first and second switches that couple the differential signal to the latch circuit;
- an output amplifier receiving the first and second logic signals to provide an output logic signal.
Dependencies are inferred from the claim text.