ECC circuit-containing semiconductor memory device and method of testing the same

An ECC circuit-containing semiconductor memory device comprising:

• error correcting code generation means for generating an error correcting code consisting of plural bits on the basis of a data consisting of plural bits;
• data storage means for storing said plural bits of said data;
• error correcting code storage means for storing said plural bits of said error correcting code;
• decoding means having a function to correct an error of each bit of said data by calculating a syndrome for error correction on the basis of said data stored in said data storage means and said error correcting code stored in said error correcting code storage means;
• and
• data input control means for arbitrarily change, in a test mode, a value of each bit of said data supplied to said error correcting code generation means,
• wherein said decoding means has a function to generate an arbitrary testing syndrome in the test mode.

An ECC circuit-containing semiconductor memory device comprising:

• error correcting code generation means including a circuit having a function to generate an error correcting code consisting of plural bits on the basis of a data consisting of plural bits;
• data storage means for storing said plural bits of said data;
• error correcting code storage means for storing said plural bits of said error correcting code;
• decoding means including a circuit having a function to generate a syndrome for error correction by calculation processing on the basis of said data stored in said data storage means and said error correcting code stored in said error correcting code storage means, and a circuit having a function to correct an error of each bit of said data;
• and
• data input control means for changing, in a test mode, a value of each bit of said data supplied to said error correcting code generation means, into a value different from said value of each bit of said data,
• wherein the functions of said error correcting code generation means and said decoding means are carried out by a shared circuit such that said shared circuit generates said error correcting code and said syndrome, and
• said decoding means has a function to generate, in the test mode, a syndrome in such a pattern that no data bit is to be correspondingly corrected but any data bit is to be correspondingly corrected when any bit of said syndrome is inverted.

A method of testing an ECC circuit-containing semiconductor memory device including error correcting code generation means including a circuit having a function to generate an error correcting code consisting of plural bits on the basis of a data consisting of plural bits, data storage means for storing said plural bits of said data, error correcting code storage means for storing said plural bits of said error correcting code, and decoding means including a circuit having a function to generate a syndrome for error correction by calculation processing on the basis of said data stored in said data storage means and said error correcting code stored in said error correcting code storage means, and a circuit having a function to correct an error of each bit of said data, said error correcting code generation means sharing a circuit with said decoding means, and said shared circuit having a function to generate said error correcting code and said syndrome, wherein the functions of said error correcting code generation means and said decoding means are carried out by a shared circuit such that said shared circuit generates said error correcting code and said syndrome, comprising the step of:

• generating a memory testing data and a memory testing error correcting code in a pattern of the same type as a pattern of said memory testing data, including, as arbitrary two bits, four types of patterns in said patterns:
• (0 0), (0 1), (1 0) and (1 1), and writing said memory testing data in said data storage means and said memory testing error correcting code in said error correcting code storage means for testing said data storage means and said error correcting code storage means.