Back to results
US 6,930,517 B2Granted
Differential transistor and method therefor
AssigneeSemiconductor Components Industries, LLC
InventorJefferson W. Hall
Life of this patent
Estimating the term…
Abstract
A differential transistor (10, 25) includes a depletion mode transistor (15,30) that has a source connected to a source of an enhancement mode transistor (11,26). The gates of the depletion mode and enhancement mode transistors are driven differentially.
Claims10
A method of forming a differential transistor comprising:
- forming an enhancement mode transistor of a first conductivity type having a source coupled to a source of a depletion mode transistor of a second conductivity type;
- forming a threshold voltage of the enhancement mode transistor so that an absolute value of the threshold voltage of the enhancement mode transistor is no greater than an absolute value of a threshold voltage of the depletion mode transistor;
- forming a second depletion mode transistor having a gate and a source coupled to receive a voltage from a voltage source and having a drain coupled to a gate of one of the enhancement mode transistor and the depletion mode transistor;
- forming a third depletion mode transistor having a drain coupled to a drain of the depletion mode transistor and having a gate and a source coupled to a gate of the other one of the enhancement mode transistor and the depletion mode transistor.
1 more element
A method of forming a differential transistor comprising:
- forming an enhancement mode transistor of a first conductivity type having a source coupled to a source of a depletion mode transistor of a second conductivity type;
- forming a threshold voltage of the enhancement mode transistor so that an absolute value of the threshold voltage of the enhancement mode transistor is no greater than an absolute value of a threshold voltage of the depletion mode transistor;
- coupling a gate of the enhancement mode transistor to a gate of another enhancement mode transistor, coupling a drain of the depletion mode transistor to a voltage return, coupling a gate of the depletion mode transistor to a gate and a source of another depletion mode transistor and to a drain of the another enhancement mode transistor, coupling a source of the another enhancement mode transistor to receive a voltage from a voltage source;
- and
- coupling a drain of the enhancement mode transistor to a first terminal of a resistor and to a signal input of a microprocessor, and coupling a second terminal of the resistor to receive the voltage from the voltage source.
2 more elements
A method of forming a differential transistor comprising:
- forming an enhancement mode transistor of a first conductivity type having a source coupled to a source of a depletion mode transistor of a second conductivity type;
- forming a threshold voltage of the enhancement mode transistor so that an absolute value of the threshold voltage of the enhancement mode transistor is no greater than an absolute value of a threshold voltage of the depletion mode transistor;
- coupling a drain of the enhancement mode transistor to receive a voltage from a voltage source;
- coupling a gate of the enhancement mode transistor to a gate of another enhancement mode transistor, coupling a drain of the depletion mode transistor to a signal mode, coupling a gate of the depletion mode transistor to a gate and a source of another depletion mode transistor and to a drain of the another enhancement mode transistor, coupling a source of the another enhancement mode transistor to receive the voltage from the voltage source;
- and
- coupling a drain of the another depletion mode transistor to a drain of a lower output transistor and coupling a source of the lower output transistor to a voltage return.
3 more elements
A method of forming a differential transistor comprising:
- forming an enhancement mode transistor of a first conductivity type having a source coupled to a source of a depletion mode transistor of a second conductivity type;
- and
- forming a threshold voltage of the enhancement mode transistor so that an absolute value of the threshold voltage of the enhancement mode transistor is no greater than an absolute value of a threshold voltage of the depletion mode transistor;
- and
- coupling the drain of the depletion mode transistor to receive a first signal, coupling a gate of the depletion mode transistor to a gate of another enhancement mode transistor, coupling the drain of the enhancement mode transistor to a voltage return, coupling a gate of the enhancement mode transistor to a drain of another depletion mode transistor and to a drain of the another enhancement mode transistor, coupling a source of the another depletion mode transistor to a gate of the another depletion mode transistor, and coupling a source of the another enhancement mode transistor to receive a voltage from a voltage source.
2 more elements
A differential transistor comprising:
- a depletion mode MOS transistor of a first conductivity type having a first source, a first drain, a first gate, and a first threshold voltage;
- an enhancement mode MOS transistor of a second conductivity type having a second source connected to the first source, having a second drain, having a second gate, and having a second threshold voltage having an absolute value that is less than an absolute value of the first threshold voltage, wherein the first drain is coupled to a first terminal of a resistor and to a signal input of a microprocessor and wherein a second terminal of the resistor is coupled to a voltage source.
A differential transistor comprising:
- a depletion mode MOS transistor of a first conductivity type having a first source, a first drain, a first gate, and a first threshold voltage;
- an enhancement mode MOS transistor of a second conductivity type having a second source connected to the first source, having a second drain, having a second gate, and having a second threshold voltage having an absolute value that is less than an absolute value of the first threshold voltage, the second drain coupled to a first terminal of a resistor and to a signal input of a microprocessor, a second terminal of the resistor coupled to a voltage source, and the first drain coupled to a voltage return.
Dependencies are inferred from the claim text.