AlGaAs or InGaP low turn-on voltage GaAs-based heterojunction bipolar transistor
AssigneeMicroLink Devices, Inc.
InventorsNoren Pan, Byung-Kwon Han
Life of this patent
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Abstract
A heterojunction bipolar transistor is provided that has a reduced turn-on voltage threshold. A base spacer layer is provided and alternately an emitter layer is provided that has a lowered energy gap. The lowered energy gap of the base spacer or the emitter spacer allow the heterojunction bipolar transistor to realize a lower turn-on voltage threshold. The thickness of the emitter layer if utilized is kept to a minimum to reduce the associated space charge recombination current in the heterojunction bipolar transistor.
Claims4
A compound semiconductor device, comprising:
- a first GaAs layer:
- a second GaAs layer formed on the first GaAs layer;
- a third p-type GaAs layer formed on the second GaAs layer;
- a p-type InyGa1−yAs layer (0.0≦Y≦0.3) formed on the third GaAs layer;
- an n type InxGa1−xP layer (0.5<x<0.7) formed on the InyGa1−yAs layer;
- an n type In0.51Ga0.49P layer formed on the n type InxGa1−xP layer;
- an n type GaAs layer formed on the n type In0.51Ga0.49P layer;
- and
- an n type InxGa1−xAs layer (0.0<x<0.6) formed on the n type GaAs layer.
A compound semiconductor device, comprising:
- a first GaAs layer:
- a second GaAs layer formed on the first GaAs layer;
- a third p-type GaAs layer formed on the second GaAs layer;
- a p-type InyGa1−yAs layer (0.0≦y≦0.3) formed on the third GaAs layer;
- an n type InyAlxGa1−x)1−yAs layer (0.0<y<0.15) (0.0<x<0.3) formed on the InyGa1−yAs layer;
- an n type Al0.3Ga0.7As layer formed on the n type Iny(AlxGa1−x)1−yAs layer;
- an n type AlxGa1−xAs (0.0<x <0.3) layer formed on the n type Al0.3Ga0.7As layer;
- an n type GaAs layer formed on the n type AlxGa1−xAs layer;
- and
- an n type InxGa1−xAs layer (0.0<x<0.6) formed on the n type GaAs layer.
A compound semiconductor device, comprising:
- a first GaAs layer:
- a second GaAs layer formed on the first GaAs layer;
- a p-type GaAs layer formed on the second GaAs layer;
- an p-type GaAs1−xSbx layer (0.0≦x≦0.3) formed on the third GaAs layer;
- an n type Iny(AlxGa1−x)1−yAs layer (0.0<y<0.3) (0.0<x<0.3) formed on the GaAs1−xSbx layer;
- an n type Al0.3Ga0.7As layer formed on the n type Iny(AlxGa1−x)1−yAs layer;
- an n type AlxGa1−xAs (0.0<x<0.5) layer formed on the n type Al0.3Ga0.7As layer;
- an n type GaAs layer formed on the n type AlxGa1−xAs layer;
- and
- an n type InxGa1−xAs layer (0.0<x<0.6) formed on the n type GaAs layer.
A heterojunction bipolar transistor, comprising,
- a contact having at least one layer of a first material;
- an emitter having an emitter spacer of an n type InxGa1−xP (0.5<x<0.7) material;
- a base having a base spacer of an GaAs1−xSbx (0.0≦x≦0.3) material;
- and
- a collector having at least one layer of said first material.
Dependencies are inferred from the claim text.