Biasing system and method for low voltage DC—DC converters with built-in N-FETs
AssigneeArques Technology
InventorsKwang H. Liu, Sorin L. Negru
Life of this patent
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Abstract
A gate drive supply circuit generating a high-level supply voltage and a low-level supply voltage for driving N-type high-side and low-side power MOSFETs in a multiple-output, low-voltage DC-DC converter integrated circuit. The gate drive supply circuit includes a boost regulator for generating the low-level supply voltage and a charge pump doubler for generating the high-level supply voltage. Both the high-level supply voltage and the low-level supply voltage are distributed to one or more regulators, including but not limited to buck or boost type regulators.
Claims13
A system for driving a first and second n-channel power switching transistors, the system comprising:
- a power conversion circuit for generating a first regulated voltage from an input voltage and including a reference voltage generator for generating a reference voltage, and an up-converter that receives the input voltage and the reference voltage and generates the first regulated voltage;
- a charge pump circuit for generating a second regulated voltage from the first regulated voltage;
- a first voltage driver having an input for receiving a pulse stream and an output for driving the gate of the first power switching transistor, and operating from a supply voltage connected to the first regulated voltage such that the first voltage driver is capable of driving the gate of the first power switching transistor substantially close to the first regulated voltage;
- and
- a second voltage driver having an input for receiving a pulse stream and an output for driving the gate of the second power switching transistor, and operating from a supply voltage connected to the second regulated voltage such that the second voltage driver is capable of driving the gate of the second power switching transistor substantially close to the second regulated voltage.
A method for driving a first and second n-channel power switching transitors, the method comprising:
- up-converting a first regulated voltage from an input voltage source;
- generating, by means of a charge pump, a second regulated voltage from the first regulated voltage, wherein the second regulated voltage is greater than the first regulated voltage;
- driving with pulses the gate of the first power switching transistor using the first regulated voltage such that the gate of the first power switching transistor can be driven substantially close to the first regulated voltage;
- and
- driving with pulses the gate of the second power switching transistor using the second regulated voltage such that the gate of the second power switching transistor can be driven substantially close to the second regulated voltage.
Dependencies are inferred from the claim text.