Signal conditioning system with adjustable gain and offset mismatches
AssigneeAnalog Devices, Inc.
InventorDavid G. Nairn
Life of this patent
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Abstract
A signal conditioning system includes first and second converters coupled to a random clock which provides a random sampling rate. Corresponding offset sensor coupled with the first and second converters sense and adjust an offset signal difference. A gain sensor is coupled with the first and second converters to sense a gain difference between the first and second converters and a gain corrector is coupled with the gain sensor to adjust the gain difference.
Claims43
A signal conditioning system, comprising:
- a first converter;
- a random clock, said random clock configured to decorrelate an input signal provided to said first converter from said random clock so that the average output signal of said first converter is proportional to a first offset signal;
- and
- a first offset sensor connected to sense the first offset signal, and in response to said sensing, to condition said first converter output.
An integrated circuit that converts between an analog signal and a corresponding digital code with a system sampling rate ƒs, said circuit comprising:
- a plurality of converter circuits clocked by a random clock, at least one converter circuit in said plurality of converter circuits sampling the analog signal at least every 1/ƒs seconds;
- and
- an offset sensing circuit configured to sense signal offsets and/or signal offset differentials between the outputs of said plurality of converter circuits.
A method of adjusting an offset signal in a signal conditioning system, comprising:
- clocking a first converter with a random clock;
- sensing a first offset signal of said first converter;
- and
- conditioning one of an input signal and an output signal of said first converter with said first offset signal.
A signal conditioning system, comprising:
- a first converter with a first gain and a second converter with a second gain, said first and second converters being clocked in a random sequence;
- and
- a gain corrector configured to adjust a difference between said first and second gains.
An integrated circuit that converts between an analog signal and a corresponding digital code at a clock rate ƒs, said circuit comprising:
- a plurality of converter circuits clocked by a random clock;
- a gain sensor circuit coupled to each converter circuit in said plurality of converter circuits, said gain sensor circuit sensing a gain from said corresponding converter circuit, each gain sensor circuit being coupled to one of said plurality of converter circuits;
- and
- a controller circuit configured to select said plurality of converter circuits in a random sequence.
A method of adjusting a gain mismatch in a signal conditioning system, comprising:
- sensing a first gain of a first converter;
- sensing a second gain of a second converter, said first and second converters being clocked with a random clock;
- and
- adjusting at least one of said first and second gains to adjust said gain mismatch between said first and second converters.
Dependencies are inferred from the claim text.