Split and merge design flow concept for fast turnaround time of circuit layout design

A system for improving a turnaround time for design verification of a process database representing a semiconductor design, comprising:

• means for deriving a timing database and a physical verification database from the process database, each containing a power mesh description for the semiconductor device, a custom routing description for the semiconductor device and standard cell power routing description for the semiconductor device;
• means for performing, using the timing database, one or more design changes and one or more timing verifications and corrections to generate a modified timing database, and for deleting the custom routing description, fixing the power mesh description to pass verification, and adding a new custom routing description to pass verification;
• means for initiating, using the process database, physical validation of the semiconductor design prior to completion of the design change and timing verification to generate a modified physical verification database;
• means for merging the modified timing database with the modified physical verification database to form a modified process database;
• and
• means for performing, using the modified process database, one or more design verification checks of the semiconductor design.