US 6,895,089 B2 · Pots splitter with line impedance matching

Abstract

Resistance in parallel with inductors in a series leg of the low-pass filter facilitates changing input and output resistance of the filter with little or no change in the reactance of the inductors. Furthermore, the reactance of the capacitors in the shunt legs of the filter will be substantially unaffected. This assists the designer in matching the impedance of the filter in the pass-band while still providing substantial impedance mismatching in the stop-band without substantially affecting the characteristics of the filter. Facilitating impedance matching in the pass-band and impedance mismatching in the stop-band is accomplished without the need for more complex active components. POTS splitters making use of such filters can facilitate impedance matching of line and load termination in a telecommunications system in response to signals within the frequencies of typical analog telephony service while providing impedance mismatching in response to signals within the frequencies of typical xDSL service.

Claims111

Dependent claims

A low-pass filter, comprising:

a first differential mode inductor in series with a second differential mode inductor;
first and second resistors in parallel with the first differential mode inductor;
third and fourth resistors in parallel with the second differential mode inductor;
a first capacitor in parallel with the third resistor;
a second capacitor in parallel with the fourth resistor;
a first shunt leg interposed between the first and second differential mode inductors and coupled across the first and second differential mode inductors;
and
a second shunt leg coupled across the second differential mode inductor.

5 more elements

A low-pass filter, comprising:

a first differential mode inductor in series with a second differential mode inductor, wherein the first differential mode inductor has an inductance value of approximately 22 mH and wherein the second differential mode inductor has an inductance value of approximately 8 mH;
first and second resistors in parallel with the first differential mode inductor, wherein the first and second resistors each have a resistance value of approximately 3.01 kΩ;
third and fourth resistors in parallel with the second differential mode inductor, wherein the third and fourth resistors each have a resistance value of approximately 5.62 kΩ;
a first capacitor in parallel with the third resistor, wherein the first capacitor has a capacitance value of approximately 0.0056 μF;
a second capacitor in parallel with the fourth resistor, wherein the second capacitor has a capacitance value of approximately 0.0056 μF;
a first shunt leg interposed between the first and second differential mode inductors and coupled across a first and second winding of the first differential mode inductor, wherein the first shunt leg comprises a third capacitor having a capacitance value of approximately 0.027 μF and a fifth resistor coupled in series with the third capacitor and having a resistance value of approximately 20Ω;
and
a second shunt leg coupled across a first and second winding of the second differential mode inductor, wherein the second shunt leg comprises a fourth capacitor having a capacitance value of approximately 0.051 μF and a sixth resistor coupled in series with the fourth capacitor and having a resistance value of approximately 20Ω;
wherein second differential mode inductor is interposed between the first shunt leg and the second shunt leg.

6 more elements

A POTS splitter, comprising:

a high-pass filter for coupling between an xDSL in port and an xDSL out port;
and
a low-pass filter for coupling between the xDSL out port and a POTS port, wherein the low-pass filter comprises:
a first differential mode inductor in series with a second differential mode inductor between the POTS port and the xDSL out port, wherein the first and second differential mode inductors each have inductance values in the range of approximately 5 mH to approximately 25 mH;
first and second resistors in parallel with the first differential mode inductor, wherein the first and second resistors each have a resistance value in the range of approximately 1 kΩ to approximately 5 kΩ;
third and fourth resistors in parallel with the second differential mode inductor, wherein the third and fourth resistors each have a resistance value in the range of approximately 5 kΩ to approximately 30 kΩ;
a first capacitor in parallel with the third resistor, wherein the first capacitor has a capacitance value in the range of approximately 0.002 μF to approximately 0.006 μF;
a second capacitor in parallel with the fourth resistor, wherein the second capacitor has a capacitance value in the range of approximately 0.002 μF to approximately 0.006 μF;
a first shunt leg interposed between the first and second differential mode inductors and coupled across a first and second winding of the first differential mode inductor, wherein the first shunt leg comprises a third capacitor having a capacitance value in the range of approximately 0.01 μF to approximately 0.03 μF;
and
a second shunt leg coupled across a first and second winding of the second differential mode inductor, wherein the second shunt leg comprises a fourth capacitor having a capacitance value in the range of approximately 0.04 μF to approximately 0.07 μF;
wherein the second differential mode inductor is interposed between the first shunt leg and the second shunt leg.

9 more elements

A POTS splitter, comprising:

a high-pass filter for coupling between an xDSL in port and an xDSL out port;
and
a low-pass filter for coupling between the xDSL out port and a POTS port, wherein the low-pass filter comprises:
a first differential mode inductor in series with a second differential mode inductor between the POTS port and the xDSL out port, wherein the first and second differential mode inductors each have inductance values in the range of approximately 5 mH to approximately 25 mH;
first and second resistors in parallel with the first differential mode inductor, wherein the first and second resistors each have a resistance value in the range of approximately 1 kΩ to approximately 5 kΩ;
third and fourth resistors in parallel with the second differential mode inductor, wherein the third and fourth resistors each have a resistance value in the range of approximately 5 kΩ to approximately 30 kΩ;
a first capacitor in parallel with the third resistor, wherein the first capacitor has a capacitance value in the range of approximately 0.002 μF to approximately 0.006 μF;
a second capacitor in parallel with the fourth resistor, wherein the second capacitor has a capacitance value in the range of approximately 0.002 μF to approximately 0.006 μF;
a first shunt leg interposed between the first and second differential mode inductors and coupled across a first and second winding of the first differential mode inductor, wherein the first shunt leg comprises a third capacitor having a capacitance value in the range of approximately 0.01 μF to approximately 0.03 μF;
and
a second shunt leg coupled across a first and second winding of the second differential mode inductor, wherein the second shunt leg comprises a fourth capacitor having a capacitance value in the range of approximately 0.04 μF to approximately 0.07 μF;
wherein second differential mode inductor is interposed between the first shunt leg and the second shunt leg.

9 more elements

A POTS splitter, comprising:

a high-pass filter for coupling between an xDSL in port and an xDSL out port;
and
a low-pass filter for coupling between the xDSL out port and a POTS port, wherein the low-pass filter comprises:
a first differential mode inductor in series with a second differential mode inductor between the POTS port and the xDSL out port, wherein the first differential mode inductor has an inductance value of approximately 22 mH and wherein the second differential mode inductor has an inductance value of approximately 8 mH;
a common mode inductor in series with the first and second differential mode inductors between the POTS port and the xDSL out port, wherein the common mode inductor has an inductance value of approximately 10 mH;
first and second resistors in parallel with the first differential mode inductor, wherein the first and second resistors each have a resistance value of approximately 3.01 kΩ;
third and fourth resistors in parallel with the second differential mode inductor, wherein the third and fourth resistors each have a resistance value of approximately 5.62 kΩ;
a first capacitor in parallel with the third resistor, wherein the first capacitor has a capacitance value of approximately 0.0056 μF;
a second capacitor in parallel with the fourth resistor, wherein the second capacitor has a capacitance value of approximately 0.0056 μF;
a first shunt leg interposed between the first and second differential mode inductors and coupled across a first and second winding of the first differential mode inductor, wherein the first shunt leg comprises a third capacitor having a capacitance value of approximately 0.027 μF and a fifth resistor coupled in series with the third capacitor and having a resistance value of approximately 20Ω;
and
a second shunt leg coupled across a first and second winding of the common mode inductor, wherein the second shunt leg comprises a fourth capacitor having a capacitance value of approximately 0.051 μF and a sixth resistor coupled in series with the fourth capacitor and having a resistance value of approximately 20Ω;
wherein common mode inductor is interposed between the second shunt leg and the second differential mode inductor.

10 more elements

A POTS splitter, comprising:

a high-pass filter for coupling between an xDSL in port and an xDSL out port;
and
a low-pass filter for coupling between the xDSL out port and a POTS port, wherein the low-pass filter comprises:
a first differential mode inductor in series with a second differential mode inductor between the POTS port and the xDSL out port;
a first resistor in parallel with a first winding of the first differential mode inductor, wherein the first winding of the first differential mode inductor corresponds to a tip line;
a second resistor in parallel with a second winding of the first differential mode inductor, wherein the second winding of the first differential mode inductor corresponds to a ring line;
a third resistor in parallel with a first winding of the second differential mode inductor, wherein the first winding of the second differential mode inductor corresponds to the tip line;
a fourth resistor in parallel with a second winding of the second differential mode inductor, wherein the second winding of the second differential mode inductor corresponds to the ring line;
a first capacitor in parallel with the first winding of the second differential mode inductor;
a second capacitor in parallel with the second winding of the second differential mode inductor;
a first shunt leg comprising a first end coupled between the first windings of the first and second differential mode inductors and a second end coupled between the second windings of the first and second differential mode inductors;
and
a second shunt leg comprising a first end coupled to the first winding of the second differential mode inductor and a second end coupled to the second winding of the second differential mode inductor;
wherein the second differential mode inductor is coupled between the first and second shunt legs.

11 more elements

A POTS splitter, comprising:

a high-pass filter for coupling between an xDSL in port and an xDSL out port;
and
a low-pass filter for coupling between the xDSL out port and a POTS port, wherein the low-pass filter comprises:
a first differential mode inductor having a first winding and a second winding, wherein the first winding corresponds to a tip line and the second winding corresponds to a ring line;
a second differential mode inductor in series with the first differential mode inductor and having a first winding and a second winding, wherein the first winding corresponds to the tip line and the second winding corresponds to the ring line;
a first resistance in parallel with the first winding of the first differential mode inductor;
a second resistance in parallel with the second winding of the first differential mode inductor;
a third resistance in parallel with the first winding of the second differential mode inductor;
a fourth resistance in parallel with the second winding of the second differential mode inductor;
a first capacitance in parallel with the third resistance;
a second capacitance in parallel with the fourth resistance;
a third capacitance coupled between the tip line and the ring line;
and
a fourth capacitance coupled between the tip line and the ring line;
wherein the third capacitance is interposed between the first and second differential mode inductors;
and
wherein the second differential mode inductor in interposed between the third and fourth capacitances.

14 more elements

A POTS splitter, comprising:

a high-pass filter for coupling between an xDSL in port and an xDSL out port;
and
a low-pass filter for coupling between the xDSL out port and a POTS port, wherein the low-pass filter comprises:
a first differential mode inductor having a first winding and a second winding, wherein the first winding corresponds to a tip line and the second winding corresponds to a ring line;
a second differential mode inductor in series with the first differential mode inductor and having a first winding and a second winding, wherein the first winding corresponds to the tip line and the second winding corresponds to the ring line;
a first resistance in parallel with the first winding of the first differential mode inductor;
a second resistance in parallel with the second winding of the first differential mode inductor;
a third resistance in parallel with the first winding of the second differential mode inductor;
a fourth resistance in parallel with the second winding of the second differential mode inductor;
a first capacitance in parallel with the third resistance;
a second capacitance in parallel with the fourth resistance;
a first shunt leg coupled between the tip line and the ring line and comprising a third capacitance in series with a fifth resistance;
and
a second shunt leg coupled between the tip line and the ring line and comprising a fourth capacitance in series with a sixth resistance;
wherein the first shunt leg is interposed between the first and second differential mode inductors;
and
wherein the second differential mode inductor in interposed between the first and second shunt legs.

14 more elements

A telecommunications system, comprising:

a carrier;
a high-pass filter coupled between the carrier and an xDSL transceiver;
and
a low-pass filter coupled between the carrier and a POTS transceiver, wherein the low-pass filter comprises:
a first differential mode inductor in series with a second differential mode inductor between the POTS transceiver and the carrier, wherein the first differential mode inductor has an inductance value of approximately 22 mH and wherein the second differential mode inductor has an inductance value of approximately 8 mH;
a common mode inductor in series with the first and second differential mode inductors between the POTS transceiver and the carrier, wherein the common mode inductor has an inductance value of approximately 10 mH;
first and second resistors in parallel with the first differential mode inductor, wherein the first and second resistors each have a resistance value of approximately 3.01 kΩ;
third and fourth resistors in parallel with the second differential mode inductor, wherein the third and fourth resistors each have a resistance value of approximately 5.62 kΩ;
a first capacitor in parallel with the third resistor, wherein the first capacitor has a capacitance value of approximately 0.0056 μF;
a second capacitor in parallel with the fourth resistor, wherein the second capacitor has a capacitance value of approximately 0.0056 μF;
a first shunt leg interposed between the first and second differential mode inductors and coupled across a first and second winding of the first differential mode inductor, wherein the first shunt leg comprises a third capacitor having a capacitance value of approximately 0.027 μF and a fifth resistor coupled in series with the third capacitor and having a resistance value of approximately 20Ω;
and
a second shunt leg coupled across a first and second winding of the common mode inductor, wherein the second shunt leg comprises a fourth capacitor having a capacitance value of approximately 0.051 μF and a sixth resistor coupled in series with the fourth capacitor and having a resistance value of approximately 20Ω;
wherein second differential mode inductor is interposed between the first shunt leg and the second shunt leg;
and
wherein the common mode inductor is interposed between the second shunt leg and the second differential mode inductor.

13 more elements

A method of impedance matching in a POTS splitter of a telecommunications system for sharing a common carrier between xDSL service and POTS service, the method comprising:

passing a first signal on a tip line between a POTS transceiver and the carrier, wherein the first signal passes through a first winding of a first differential mode inductor and a first winding of a second differential mode inductor in series while a first resistance is in parallel with the first winding of the first differential mode inductor, a second resistance is in parallel with the first winding of the second differential mode inductor and a first capacitance is in parallel with the first winding of the second differential mode inductor and the second resistance;
passing a second signal on a ring line between a POTS transceiver and the carrier, wherein the second signal passes through a second winding of the first differential mode inductor and a second winding of the second differential mode inductor in series while a third resistance is in parallel with the second winding of the first differential mode inductor, a fourth resistance is in parallel with the second winding of the second differential mode inductor and a second capacitance is in parallel with the second winding of the second differential mode inductor and the fourth resistance.

Dependencies are inferred from the claim text.

Pots splitter with line impedance matching

Life of this patent

Pots splitter with line impedance matching

Life of this patent

Abstract

Claims111