Dual source lithography for direct write application
AssigneeLSI Logic Corporation
InventorsMichael J. Berman, George E. Bailey
Life of this patent
Estimating the term…
Abstract
A dual exposure source lithography system forms a first and a second portion of a pattern on a wafer. An optical lithography module forms the first portion of the pattern. A non-optical lithography module forms the second portion of the pattern using a non-optical lithography exposure source. The non-optical exposure source is an electron beam lithography source, an EUV source, an x-ray source, or another next generation lithography system exposure source. A mask design file is decomposed into separate design files reflecting critical and non-critical components of the pattern to be formed on the wafer.
Claims31
A dual source lithography system for forming a first and second component of a pattern on a wafer, one of the first and second components comprising critical components of a pattern and the other comprising non-critical components, the dual source lithography system comprising:
- a first lithography exposure source for forming the first components of the pattern on a resist layer of the wafer;
- a second lithography exposure source for forming the second components of the pattern on the resist layer of the wafer;
- and
- a CPU configured to import a photomask design file and export at least two design files, a first design file having features with a level of detail finer than a predetermined threshold and a second design file having a level of detail equal to or coarser than a predetermined threshold.
A method of forming a pattern on a wafer, the method comprising:
- providing a first design file that contains pattern information concerning critical components of the pattern enabling the formation of pattern features having a level of detail equal to or finer than a predetermined threshold;
- providing a second design file that contains pattern information concerning non-critical components of the pattern enabling the formation of pattern features having a level of detail greater than the predetermined threshold;
- forming the first critical components of a pattern on a resist layer of a wafer by exposing the resist layer of the wafer to an first lithography exposure source in accordance with the pattern information in the first design file;
- and
- forming the second non-critical components of a pattern on the resist layer of the wafer by exposing the resist to a second lithography exposure source in accordance with the pattern information in the second design file.
A dual source lithography system for forming a first and second component of a pattern on a wafer, first component comprising critical components of a pattern and the the second component comprising non-critical components, the dual source lithography system comprising:
- a first lithography exposure source for forming the first components of the pattern on a resist layer of the wafer;
- a second lithography exposure source for forming the second components of the pattern on the resist layer of the wafer;
- and
- a CPU including a mask design decomposition system configured to import a photomask design file and export at least two component design files derived from the photomask design file, a first component design file that is associated with the critical components and is configured to pattern features having a level of detail finer than a predetermined threshold and a second component design file that is associated with the non-critical components and is configured to pattern features having a level of detail equal to or coarser than the predetermined threshold.
Dependencies are inferred from the claim text.