Evaporated LaA1O3 films for gate dielectrics

A method of forming a gate dielectric on a transistor body region, comprising:

• evaporating Al2O3 at a first rate using a first electron gun;
• evaporating La2O3 at a second rate using a second electron gun;
• controlling the first rate and the second rate to provide a film containing LaAlO3 on the transistor body region;
• and
• annealing in N2 after providing the film containing LaAlO3 on the transistor body region.

A method of forming a transistor, comprising:

• forming first and second source/drain regions;
• forming a body region between the first and second source/drain regions;
• evaporating Al2O3 at a first rate;
• evaporating La2O3 at a second rate;
• controlling the first rate and the second rate to provide a film containing LaAlO3 on the body region;
• and
• coupling a gate to the film containing LaAlO3.

A method of forming a memory array, comprising:

• forming a number of access transistors, comprising:
• forming first and second source/drain regions;
• forming a body region between the first and second source/drain regions;
• evaporating Al2O3 at a first rate;
• evaporating La2O3 at a second rate;
• controlling the first rate and the second rate to provide a film containing LaAlO3 on the body region;
• and
• coupling a gate to the film containing LaAlO3;
• forming a number of wordlines coupled to a number of the gates of the number of access transistors;
• forming a number of sourcelines coupled to a number of the first source/drain regions of the number of access transistors;
• and
• forming a number of bitlines coupled to a number of the second source/drain regions of the number of access transistors.

A method of forming an information handling system, comprising:

• forming a processor;
• forming a memory array, comprising:
• forming a number of access transistors, comprising:
• forming first and second source/drain regions;
• forming a body region between the first and second source/drain regions;
• evaporating Al2O3 at a first rate;
• evaporating La2O3 at a second rate;
• controlling the first rate and the second rate to provide a film containing LaAlO3 on the body region;
• and
• coupling a gate to the film containing LaAlO3;
• forming a number of wordlines coupled to a number of the gates of the number of access transistors;
• forming a number of sourcelines coupled to a number of the first source/drain regions of the number of access transistors;
• forming a number of bitlines coupled to a number of the second source/drain regions of the number of access transistors;
• and
• forming a system bus that couples the processor to the memory array.