Method and apparatus for determining critical timing path sensitivities of macros in a semiconductor device

Abstract

A method for determining critical timing path sensitivities of macros in a semiconductor device includes configuring a timing parameter of a particular macro in the semiconductor device; determining a first maximum operating frequency of the semiconductor device configured in accordance with the timing parameter; changing the timing parameter of the particular macro; determining a second maximum operating frequency of the semiconductor device configured in accordance with the changed timing parameter; and determining a contribution of the selected macro to a critical timing path of the semiconductor device based on the first and second maximum operating frequencies. A system for testing a semiconductor device having a plurality of macros includes a tester and a controller. The tester is adapted to configure a timing parameter of a particular macro in the semiconductor device, determine a first maximum operating frequency of the semiconductor device configured in accordance with the timing parameter, change the timing parameter of the particular macro, and determine a second maximum operating frequency of the semiconductor device configured in accordance with the changed timing parameter. The controller is adapted to receive the first and second maximum operating frequencies and determine a contribution of the selected macro to a critical timing path of the semiconductor device based on the first and second maximum operating frequencies.

Dependencies are inferred from the claim text.