Differential via pair impedance verification tool

An apparatus for verifying differential via pair impedance, comprising:

• a. at least one computer readable medium;
• and
• b. computer readable program code stored on said at least one computer readable medium, said computer readable program code comprising:
• i. program code for reading parameters for a modal characteristic impedance calculation for a differential via pair;
• ii. program code for identifying said differential via pair in a design database;
• iii. program code for identifying neighboring vias near said differential via pair to include in said modal characteristic impedance calculation by establishing a two-dimensional window around said differential via pair;
• iv. program code for calculating said modal characteristic impedance of said differential via pair;
• and
• v. program code for flagging said differential via pair if said modal characteristic impedance is incorrect.

An apparatus for verifying differential via pair impedance, comprising:

• means for reading characteristics about a differential via pair from a circuit design database;
• means for selecting neighboring vias around said differential via pair for use in calculating an odd mode impedance of said differential via pair said means for selecting comprising establishing a two-dimensional window around said differential via pair;
• means for calculating said odd mode impedance;
• and
• means for flagging said differential via pair if said odd mode impedance does not have a desired value.