Method and apparatus for verifying consistency between a first address repeater and a second address repeater
AssigneeSun Microsystems, Inc.
InventorsTai Quan, Brian L. Smith, James C. Lewis
Life of this patent
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Abstract
In a computer system having a first repeater and a second repeater, the first repeater coupled to the second repeater by a bus, the first repeater operable to transmit a transaction and a control signal to the second repeater, a method, performed by the second repeater, of generating an error comprising: predicting, in a first cycle, that a transaction should be transmitted from the first repeater to the second repeater; determining if a control signal was received within a predetermined number of cycles of the first cycle; and if the control signal is not received within the predetermined number of cycles of the first cycle, then generating an error.
Claims18
In a computer system having a first repeater and a second repeater, the first repeater coupled to the second repeater by a bus, the first repeater operable to transmit a transaction and a control signal to the second repeater, a method, performed by the second repeater, of generating an error comprising:
- a) predicting, in a first cycle, that a transaction should be transmitted from the first repeater to the second repeater, the act of predicting including an arbiter predicting, based at least in part upon the arbiter receiving a second signal from a third repeater, that the transaction should be transmitted;
- b) determining if a control signal was received within a predetermined number of cycles of the first cycle;
- and
- c) if the control signal was not received within the predetermined number of cycles of the first cycle, then generating an error.
In a computer system having a first repeater, a second repeater, and a third repeater, the first repeater coupled to the second repeater and the third repeater, the first repeater operable to transmit a transaction to the second repeater and operable to transmit a control signal to the third repeater, a method, performed by the third repeater, of generating an error comprising:
- a) predicting, in a first cycle, that a transaction that originated from the third repeater should be transmitted from the first repeater to the second repeater;
- b) determining if a control signal was received within a predetermined number of cycles of the first cycle;
- and
- c) if the control signal was not received within the predetermined number of cycles of the cycle in which the prediction was made, then generating an error.
In a computer system having a first repeater, a second repeater, and a third repeater, the first repeater coupled to the second repeater and the third repeater, the first repeater operable to transmit a transaction to the second repeater and operable to transmit a control signal to the second repeater, a method, performed by the second repeater, of generating an error comprising:
- a) predicting, in a first cycle, that a transaction that originated from the third repeater should be transmitted from the first repeater to the second repeater;
- b) determining if a control signal was received within a predetermined number of cycles of the first cycle;
- and
- c) if the control signal was not received within the predetermined number of cycles of the first cycle, then generating an error.
Dependencies are inferred from the claim text.