Variable maximum die temperature based on performance state

A computing system comprising:

• an integrated circuit operable at multiple performance states, the performance states being defined by at least one of operating voltage and frequency;
• and wherein the computing system provides that the integrated circuit, at a first detected temperature, has a first maximum performance state and a first plurality of lesser performance states;
• and wherein at a second detected temperature, higher than the first detected temperature, the integrated circuit has a lower maximum performance state and a second plurality of lesser performance states, the lower maximum performance state providing lower performance than the first maximum performance state in terms of maximum power consumption;
• and wherein the lower maximum performance state is one of the first plurality of lesser performance states.

A computer program product encoded in at least one computer readable medium, the computer program product comprising:

• a plurality of groups of performance operating states, each of the groups of performance operating states having a different maximum operating state, the groups of operating states corresponding to respective different temperature ranges related to operation of a processor;
• and
• an instruction sequence executable to change to a different group of performance operating states and thereby a different maximum operating state according to a detected temperature associated with the computer system;
• and wherein a maximum operating state of one group of performance operating states is available as an operating state in another group.

A method of operating an integrated circuit comprising:

• in a first temperature range varying an operating state of the integrated circuit within a first plurality of performance states, the first plurality of performance states having a first performance state as a maximum state;
• in a second temperature range varying the operating state of the integrated circuit within a second plurality of performance states having a second performance state as the maximum state, the second performance state being a lower performance state than the first performance state;
• and
• in a third temperature range varying the operating state of the integrated circuit within a third plurality of performance states having a third performance state as the maximum performance state, the third performance state being lower than the second performance state;
• wherein each of the performance states in the first, second, and third pluralities of performance states are defined by at least one of operating voltage and operating frequency;
• and
• wherein the operating state of the integrated circuit is varied in each of the first, second, and third temperature ranges according to integrated circuit utilization.