Resource interconnection patterns in a customized memory organization context

An essentially digital device comprising:

• a plurality of resources;
• and
• an optimized interconnection pattern between the resources, the optimized interconnection pattern comprising a plurality of buses, each of the buses interconnecting a portion of the resources;
• wherein the essentially digital device is represented by a representation describing the functionality of the essentially digital device, the representation comprising:
• a plurality of transfers that are defined by a source resource and a destination resource that are selected from the plurality of resources;
• and
• a plurality of scheduling intervals for the transfers;
• and
• wherein the essentially digital device is represented by the optimized interconnection pattern such that at least one bus facilitates a plurality of transfers with non-overlapping transfer scheduling intervals, and wherein the optimized interconnection pattern satisfies at least the constraints determined by an optimized labeling of a transfer conflict graph comprising transfer nodes representing transfers and further comprising conflicting transfer edges representing a conflict between the transfers, wherein the transfer conflict graph is determined at least in part from the scheduling intervals, and wherein determining the optimized labeling of the transfer conflict graph comprises labeling an endpoint of each edge such that each edge endpoint has a different label, while using a minimum amount of labels.

An essentially digital device comprising:

• a plurality of resources;
• and
• an optimized interconnection pattern between the resources, the optimized interconnection pattern comprising a plurality of buses, each of the buses interconnecting at least a portion of the resources;
• wherein the essentially digital device is represented by a representation describing the functionality of the digital device, the representation comprising:
• a plurality of transfers defined by a source resource and a destination resource that are selected from the plurality of resources;
• and
• a plurality of scheduling intervals for the transfers;
• and
• wherein the digital device is represented by the optimized interconnection pattern such that at least one of the buses facilitates a plurality of transfers with non-overlapping transfer scheduling intervals or temporarily facilitates a plurality of transfers with partially overlapping scheduling intervals, and wherein the optimized interconnection pattern satisfies at least the constraints depicted by an optimized labeling of a transfer conflict graph, wherein the transfer conflict graph is determined from at least the scheduling intervals, wherein said transfer conflict graph comprises transfer nodes representing transfers and further comprises conflicting transfer edges representing a conflict between the transfers, and wherein determining the optimized labeling of the transfer conflict graph comprises labeling an endpoint of each edge such that each edge endpoint has a different label, while using a minimum amount of labels.

A design system for designing an essentially digital device, the system comprising:

• means for generating a representation describing the functionality of the essentially digital device, the representation comprising transfers and scheduling intervals for the transfers;
• means for determining an optimized labeling of a transfer conflict graph that is determined from the scheduling intervals, the determining comprising uniquely labeling endpoints of transfer edges;
• and
• means for selecting an optimized interconnection pattern that satisfies at least the constraints depicted by the optimized labeling of the transfer conflict graph.

A method of determining an optimized resource interconnection pattern within an essentially digital device, the method comprising:

• determining a transfer conflict graph, wherein the transfer conflict graph comprises transfer nodes representing transfers and further comprises conflicting transfer edges representing a conflict between the transfers;
• determining an optimized labeling of the transfer conflict graph that is determined at least in part from a plurality of scheduling intervals, wherein determining the optimized labeling of the transfer conflict graph comprises labeling an endpoint of each edge such that each edge endpoint has a different label, while using a minimum amount of labels;
• selecting an optimized interconnection pattern for at least one of a plurality of partial digital devices that satisfies at least the constraints determined by the optimized labeling of the transfer conflict graph;
• determining at least one bus for interconnection of the plurality of partial digital devices;
• determining an access conflict graph representing the interconnection of the plurality of partial digital devices;
• determining an optimized labeling of the access conflict graph that is determined at least in part from a plurality of conflicts between accesses to a plurality of resources for the plurality of partial digital devices;
• and
• selecting an optimized interconnection pattern for the plurality of partial digital devices that satisfies at least the constraints determined by the optimized labeling of the access conflict graph.