Wavelet transformation engine
AssigneeLightSurf Technologies, Inc.
InventorMark J. Sandford
Life of this patent
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Abstract
An ASIC-implemented wavelet transformation engine (circuit) providing a wavelet filter is described. The wavelet filter itself provides up to a 9-stage FIR (finite impulse response) filter with symmetrical coefficients. The architecture of the filter includes data inputs, a bank of shift registers (register bank), coefficient registers, a multiplier/accumulator, a sub-sampling component, and output (results) registers. The filter provides a wavelet-based compression solution that may be implemented in less-costly, page-based memory architecture (e.g., SDRAM), and does so in a manner that overcomes the inherent speed disadvantage encountered due to the horizontal-optimized access strategy employed by page-based memory architectures.
Claims70
A wavelet transformation circuit comprising:
- a set of data inputs;
- a bank of shift registers, for loading a succession of pixel value from a digital image, each successive pixel value being loaded at a preselected clock interval;
- a set of coefficient registers that correspond to said bank of shift registers, for storing coefficient values implementing a wavelet filter;
- a multiplier/accumulator circuit that generates, at said preselected clock interval, a result based on application of said coefficient values against the succession of pixel values stored by said bank of shift registers;
- and
- at least one result register for storing said result.
A method for performing high-pass and low-pass filtering required for a wavelet transformation, the method comprising:
- storing a high-pass set of coefficient values for high-pass filtering, and a low-pass set of coefficient values for low-pass filtering;
- shifting into a bank of shift registers a succession of pixel values from a digital image;
- and
- as each successive pixel value is shifted in, alternating between
- generating a high-pass result based on application of said high-pass coefficient values against the then-current pixel values stored by said bank of shift registers, and
- generating a low-pass result based on application of said low-pass coefficient values against the then-current pixel values stored by said bank of shift registers.
A wavelet filter circuit providing up to a nine stage finite input response filter, said circuit comprising:
- a set of high-pass and a set of low-pass data inputs;
- a bank of shift registers for storing data values received from said data inputs;
- coefficient registers for alternately storing a set of coefficients for high-pass filtering and a set of coefficients for low-pass filtering;
- and
- a multiplier/accumulator for applying coefficients stored in said coefficient registers against said data values in said shift registers to generate new values.
A method for rendering wavelet-transformed versions of digital images, said method comprising:
- inputting successive pixel values from a digital image into a bank of shift registers;
- applying pixel weightings against the then current pixel values in said bank of shift registers, alternating between high-pass pixel weightings and low-pass pixel weightings to generate a set of high-pass values and a set of low-pass values, respectively;
- and
- outputting said high-pass values and said low-pass values in a result register.
Dependencies are inferred from the claim text.