Interface apparatus and method for receiving serially-transmitted data
AssigneeYamaha Corporation
InventorMasahiro Ito
Life of this patent
Estimating the term…
Abstract
Serially transmitted digital data are received in a predetermined format such as an SPDIF format. In the format, identification data are incorporated in the serial data in predetermined cycles. Generation of a train of bit-extracting pulses having a predetermined pulse generation pattern is triggered by detection of a pulse edge of the received serial data. By counting the bit-extracting pulses, bit location information is generated which identifies each bit location in the received serial data. Each identification data is detected from among the received digital data and the number of detections of the identification data within a predetermined time period is calculated, so as to identify a transmission rate of the digital data on the basis of the number of detections.
Claims18
An interface apparatus for receiving digital data serially transmitted in a predetermined format where predetermined identification data are incorporated in serial digital data in predetermined cycles, said interface apparatus comprising:
- a pulse train generation circuit that generates a bit-data extracting pulse train, having predetermined pulse generation patterns, in response to detection of a variation in received serial digital data;
- a bit-location information generation circuit that, on the basis of the bit-data extracting pulse train generated by said pulse train generation circuit, generates bit location information specifying each bit location in the received serial digital data;
- a bit-data extraction circuit that extracts data of each bit from the received serial digital data by use of the generated bit-data extracting pulse train;
- an identification data detection circuit that detects the identification data from the data extracted by said bit-data extraction circuit;
- a control device that is adapted to set a locked state at least on condition that the bit location information generated by said bit-location information generation circuit when the identification data is detected by said identification data detection circuit corresponds to a predetermined bit location, and generate a lock status signal in correspondence with setting of the locked state;
- and
- a data reproduction circuit that, on the basis of the data of each bit extracted by said bit-data extraction circuit and with reference to the bit location information, reproduces the received serial digital data on condition that the lock status signal is indicative of the locked state;
- wherein said control device sets the locked state on further condition that two of the identification data have been detected in succession and a parity calculation for a subframe immediately preceding detection of a second one of the two identification data has yielded a predetermined result.
An interface apparatus for receiving digital data serially transmitted in a predetermined format where predetermined identification data are incorporated in serial digital data in predetermined cycles, said interface apparatus comprising:
- a pulse train generation circuit that generates a bit-data extracting pulse train, having predetermined pulse generation patterns, in response to detection of a variation in received serial digital data;
- a bit-location information generation circuit that, on the basis of the bit-data extracting pulse train generated by said pulse train generation circuit, generates bit location information specifying each bit location in the received serial digital data;
- a bit-data extraction circuit that extracts data of each bit from the received serial digital data by use of the generated bit-data extracting pulse train;
- an identification data detection circuit that detects the identification data from the data extracted by said bit-data extraction circuit;
- a control device that is adapted to set a locked state at least on condition that the bit location information generated by said bit-location information generation circuit when the identification data is detected by said identification data detection circuit corresponds to a predetermined bit location, and generate a lock status signal in correspondence with setting of the locked state;
- and
- a data reproduction circuit that, on the basis of the data of each bit extracted by said bit-data extraction circuit and with reference to the bit location information, reproduces the received serial digital data on condition that the lock status signal is indicative of the locked state wherein
- said identification data detection circuit includes a circuit for detecting a longest pulse width pattern in the detected identification data,
- a transmission rate of the received serial digital data is identified on the basis of the longest pulse width pattern in the detected identification data, and
- said pulse train generation circuit generates the bit-data extracting pulse train having pulse generation patterns corresponding to the identified transmission rate of the received serial digital data.
A method for receiving digital data serially transmitted in a predetermined format where predetermined identification data are incorporated in serial digital data in predetermined cycles, said method comprising the steps of:
- generating a bit-data extracting pulse train, having predetermined pulse generation patterns, in response to detection of a variation in received serial digital data;
- generating bit location information specifying each bit location in the received serial digital data, on the basis of the generated bit-data extracting pulse train;
- extracting data of each bit from the received serial digital data by use of the generated bit-data extracting pulse train;
- detecting the identification data from the data extracted by said step of extracting;
- setting a locked state at least on condition that the bit location information generated by said step of generating bit location information when the identification data is detected by said step of detecting identification data corresponds to a predetermined bit location, and generating a lock status signal in correspondence with setting of the locked state;
- and
- reproducing, on the basis of the data of each bit extracted by said step of extracting and with reference to the bit location information, the received serial digital data on condition that the lock status signal is indicative of the locked state
- wherein said step of setting sets the locked state on further condition that two of the identification data have been detected in succession and a parity calculation for a subframe immediately preceding detection of a second one of the two identification data has yielded a predetermined result.
A method for receiving digital data transmitted at any one of a plurality of predetermined transmission rates and identifying the transmission rate of the received digital data, identification data of peculiar patterns being incorporated in the transmitted digital data repetitively in predetermined cycles, an actual time length of the predetermined cycles depending on the transmission rate, the peculiar patterns being in the form of data patterns having a plurality of types of pulse-width pattern lengths, said method comprising the steps of:
- measuring the pulse-width pattern lengths of individual ones of the data patterns present in the received digital data, by use of predetermined clock pulses;
- detecting, from among the pulse-width pattern lengths measured by said step of measuring, a predetermined type of pulse-width pattern length present in the peculiar patterns and extracting the peculiar patterns in accordance with detection of the predetermined type of pulse-width pattern length, to thereby detect the identification data;
- calculating a number of detections of the identification data within a predetermined time period;
- and
- identifying the transmission rate of the received digital data on the basis of the number of detections of the identification data and a measured value of the predetermined type of pulse-width pattern length.
A machine-readable storage medium containing a group of instructions to cause said machine to implement a method for receiving digital data transmitted at any one of a plurality of predetermined transmission rates and identifying the transmission rate of the received digital data, identification data of peculiar patterns being incorporated in the transmitted digital data repetitively in predetermined cycles, an actual time length of the predetermined cycles depending on the transmission rate, the peculiar patterns being in the form of data patterns having a plurality of types of pulse-width pattern lengths, said method comprising the steps of:
- measuring the pulse-width pattern lengths of individual ones of the data patterns present in the received digital data, by use of predetermined clock pulses;
- detecting, from among the pulse-width pattern lengths measured by said step of measuring, a predetermined type of pulse-width pattern length present in the peculiar patterns and extracting the peculiar patterns in accordance with detection of the predetermined type of pulse-width pattern length, to thereby detect the identification data;
- calculating a number of detections of the identification data within a predetermined time period;
- and
- identifying the transmission rate of the received digital data on the basis of the number of detections of the identification data and a measured value of the predetermined type of pulse-width pattern length.
An interface apparatus adapted to receive digital data transmitted at any one of a plurality of predetermined transmission rates and identify the transmission rate of the received digital data, identification data of peculiar patterns being incorporated in the transmitted digital data repetitively in predetermined cycles, an actual time length of the predetermined cycles depending on the transmission rate, the peculiar patterns being in the form of data patterns having a plurality of types of pulse-width pattern lengths, said interface apparatus comprising:
- a measurement circuit for measuring the pulse-with pattern lengths of individual ones of the data patterns present in the received digital data, by use of predetermined clock pulses;
- and
- a control device coupled with said measurement circuit and adapted to:
- detect, from among the pulse-width pattern lengths measured by said measurement circuit, a predetermined type of pulse-width pattern length present in the peculiar patterns and extract the peculiar patterns in accordance with detection of the predetermined type of pulse-width pattern length, to thereby detect the identification data;
- calculate a number of detections of the identification data within a predetermined time period;
- and
- identify the transmission rate of the received digital data on the basis of the number of detections of the identification data and a measured value of the predetermined type of pulse-width pattern length.
A method for receiving digital data serially transmitted in a predetermined format where predetermined identification data are incorporated in serial digital data in predetermined cycles, said method comprising the steps of:
- generating a bit-data extracting pulse train, having predetermined pulse generation patterns, in response to detection of a variation in received serial digital data;
- generating bit location information specifying each bit location in the received serial digital data, on the basis of the generated bit-data extracting pulse train;
- extracting data of each bit from the received serial digital data by use of the generated bit-data extracting pulse train;
- detecting the identification data from the data extracted by said step of extracting;
- setting a locked state at least on condition that the bit location information generated by said step of generating bit location information when the identification data is detected by said step of detecting identification data corresponds to a predetermined bit location, and generating a lock status signal in correspondence with setting of the locked state;
- and
- reproducing, on the basis of the data of each bit extracted by said step of extracting and with reference to the bit location information, the received serial digital data on condition that the lock status signal is indicative of the locked state, wherein
- said step of detecting the identification data includes a step of detecting a longest pulse with pattern in the detected identification data,
- a transmission rate of the received serial digital data is identified on the basis of the longest pulse width pattern in the detected identification data, and
- said step of generating a bit-data extracting pulse train generates the bit-data extracting pulse train having pulse generation patterns corresponding to the identified transmission rate of the received serial digital data.
Dependencies are inferred from the claim text.