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US 6,888,879 B1Granted
Method and apparatus for fast acquisition and low SNR tracking in satellite positioning system receivers
AssigneeTrimble Navigation Limited
InventorGary R. Lennen
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Abstract
A satellite positioning system (SATPS) receiver has a mix of standard and enhanced digital channel processors. The standard digital channel processors perform continuous tracking. During a low SNR and/or fast acquisition mode, the enhanced digital channel processor accumulates samples of a SATPS signal that are identically positioned within corresponding PRN code repetition periods, and plays back the stored accumulated values of the samples in an integration period to a correlation section for correlation with a locally generated PRN code.
Claims41
An enhanced digital channel processor for a satellite positioning system (SATPS) receiver, comprising:
- a memory processor having a storage device,
- wherein, during a low SNR and/or fast acquisition mode, said memory processor accumulates samples of a down-converted SATPS signal that have sequential ordinal positions that are repeated within each of a plurality of pseudo-random noise (PRN) code repetition periods in an integration period, stores in said storage device a separate accumulated sum for each ordinal position of each code repetition period, and plays the sums back at a substantially accelerated rate.
A satellite positioning system (SATPS) receiver, comprising:
- at least one enhanced digital channel processor processing input signal samples, each of said at least one enhanced digital channel processor having a memory processor which, during a low SNR and/or fast acquisition mode, accumulates samples of a down-converted SATPS signal that have sequential ordinal positions that are repeated within each of a plurality of pseudo-random noise (PRN) code repetition periods in an integration period, stores in said storage device a separate accumulated sum for each ordinal position of each code repetition period, and plays back at a substantially accelerated rate the accumulated sums for the respective sample positions of the PRN code repetition period.
A method for low SNR and/or fast acquisition and measurement for a satellite positioning system (SATPS) receiver, comprising the steps of:
- accumulating samples of a down-convened SATPS signal that have sequential ordinal positions that are repeated within each of a plurality of pseudo-random noise (PRN) code repetition periods in an integration period, stores in said storage device a separate accumulated sum for each ordinal position of each code repetition period;
- and
- playing back at a substantially accelerated rate the accumulated sums for the respective sample positions of the PRN code repetition period.
In a system wherein an incoming signal is transmitted in successive pseudo-random noise (PRN) code repetition periods, an enhanced processor comprising:
- a memory for accumulating digital samples of said signal, wherein said samples have sequential ordinal positions that are repeated within each of a plurality of pseudo-random noise (PRN code repetition periods in an integration period, stores in said storage device a separate accumulated sum for each ordinal position of each code repetition period;
- and
- playback apparatus for playing back the accumulated samples for each of said positions at a rate that is accelerated as compared to the rate at which said memory accumulates said samples.
A method comprising the steps of:
- receiving an incoming signal that is transmitted in successive pseudo-random noise (PRN) code repetition periods;
- accumulating digital samples of said signal, wherein said samples have sequential ordinal positions that are repented within each of a plurality of pseudo-random noise (PRN) code repetition periods in an integration period, stores in said storage device a separate accumulated sum for each ordinal position of each code repetition period;
- and
- playing back the accumulated samples for each of said positions at a rate that is accelerated as compared to the rate of accumulating said samples.
1 more element
A signal receiver for receiving a signal that is spread by a repeating signal code having a plurality of code repetition periods in an integration period, comprising:
- a memory processor for accumulating symbol values of a frequency translated representation of said signal, wherein said symbol values have sequential ordinal signal time positions that are repeated within each of said code repetition periods for providing a separate accumulated sum for each ordinal position of each code repetition period;
- and
- a correlation section for correlating said integration period accumulation values with a locally generated replica of said signal code for determining correlations for time relationships, respectively, between said signal code and said replica code.
A signal receiver for receiving a signal that is spread by a repeating signal code having a code repetition period, comprising:
- a memory processor for accumulating symbol values of a frequency translated representation of said signal, said symbol values being accumulated for repeating signal time positions, respectively, within said code repetition period during a signal integration period of more than one said code repetition period for providing integration period accumulation values corresponding to said signal time positions, respectively;
- and
- a correlation section for correlating said integration period accumulation values with a locally generated replica of said signal code for determining correlations for time relationships, respectively, between said signal code and said replica code;
- wherein
- the memory processor includes an adder processor for adding newly received ones of said symbol values with accumulated ones of said symbol values according to said signal time positions;
- and a comparator for compressing said accumulated symbol values into compressed values and issuing said compressed values as said integration period accumulation values;
- and
- wherein:
- said accumulated symbol values include a first symbol accumulation bit and an accumulated magnitude value for symbol accumulation bits not including said first symbol accumulation bit;
- and
- said compressed values respectively include a first bit corresponding to said first symbol accumulation bit, a second bit depending upon said accumulated magnitude value being greater or lesser than a first threshold;
- and a third bit depending upon said accumulated magnitude value being greater or lesser than a second threshold.
9 more elements
A method for receiving a signal that is spread by a repeating signal code having a plurality of code repetition periods in an integration period, comprising:
- accumulating symbol values of a frequency translated representation of said signal, wherein said symbol values have sequential ordinal signal time positions that are repeated within each of said code repetition periods for providing a separate accumulated sum for each ordinal position of each code repetition period;
- and
- correlating said integration period accumulation values with a locally generated replica of said signal code for determining correlations for time relationships, respectively, between said signal code and said replica code.
A method for receiving a signal that is spread by a repeating signal code having a code repetition period, comprising:
- accumulating symbol values of a frequency translated representation of said signal, said symbol values being accumulated for repeating signal time positions, respectively, within said code repetition period during a signal integration period of more than one said code repetition period for determining integration period accumulation values corresponding to said signal time positions, respectively;
- and
- correlating said integration period accumulation values with a locally generated replica of said signal code for determining correlations for time relationships, respectively, between said signal code and said replica code, wherein:
- the step of accumulating signal symbol values includes adding newly received ones of said symbol values with accumulated ones of said symbol values according to said signal time positions;
- compressing said accumulated symbol values into compressed values;
- and issuing said compressed values as said integration period accumulation values;
- said accumulated symbol values include a first symbol accumulation bit and an accumulated magnitude value for symbol accumulation bits not including said first symbol accumulation bit;
- and
- said compressed values respectively include a first bit corresponding to said first symbol accumulation bit, a second bit depending upon said accumulated magnitude value being greater or lesser than a first threshold, and a third bit depending upon said accumulated magnitude value being greater or lesser than a second threshold.
6 more elements
Dependencies are inferred from the claim text.