Back to results
US 6,888,776 B2Granted
Semiconductor memory device
AssigneesRenesas Technology Corp., Mitsubishi Electric Engineering Company Limited
InventorsNaoya Watanabe, Aiko Nishino, Katsumi Dosaka
Life of this patent
Estimating the term…
Abstract
A main control circuit generates a plurality of main control signals of different phases to local control circuits. The local control circuits produce row-related control signals greater in number than the main control signals in accordance with these main control signals. A semiconductor memory device can be easily adapted to change in bank structure, and can perform a fast and stable operation with a low current consumption.
Claims16
A semiconductor memory device comprising:
- a memory array including a plurality of memory cells arranged in rows and columns;
- main control circuitry for producing a plurality of main control signals having different phases in response to a row-related instructing signal instructing an operation related to row selection in said memory array;
- and
- sub-control circuitry receiving said plurality of main control signals, for producing sub-control signals greater in number than said plurality of main control signals, said sub-control signals being signals for controlling the operation instructed by said row-related instructing signal.
1 more element
A semiconductor memory device comprising:
- a memory array including a plurality of memory cells arranged in rows and columns;
- main control circuitry for producing a plurality of main control signals having different phases in response to a data access instructing signal instructing an operation related to data accessing in said memory array;
- and
- sub-control circuitry receiving said plurality of main control signals, for producing sub-control signals for controlling the operation instructed by said data access instrucing signal.
1 more element
Dependencies are inferred from the claim text.