Ferroelectric memory and method of reading the same
AssigneeIntel Corporation
InventorDavid GenLong Chow
Life of this patent
Estimating the term…
Abstract
A ferroelectric memory includes wordlines that cross over bitlines with a ferroelectric cell at each crossing. When reading a select cell of the array, sneak currents are drawn from an active bitline. An integration amplifier begins integrating charge propagated by the active bitline, and an active wordline receives a read level voltage. A first integration value is then obtained from the integration amplifier. Following the first integration, the integration amplifier is cleared and the voltage of the active wordline reduced to a quiescent level. Integration and wordline activation are again performed to obtain a second integration value. The second value is subtracted from the first, and the difference compared to a threshold to determine a data value.
Claims23
A method, comprising:
- drawing a sneak current from ferroelectric memory cells of a memory array other than a selected ferroelectric memory;
- and
- beginning to measure an amount of charge from the selected ferroelectric memory cell before applying a read signal to the selected memory cell.
A method of reading data, comprising:
- enabling an integrating amplifier that is coupled to a target ferroelectric cell of a memory array prior to applying a read signal to a conductive line that is coupled to the target cell.
A method, comprising:
- setting an active word line to a first voltage level;
- beginning to determine an amount of charge from a ferroelectric cell that is coupled to the active word line;
- and then
- driving the active word line to a cell reading voltage level.
Dependencies are inferred from the claim text.