Ferroelectric transistor for storing two data bits
AssigneeCOVA Technologies, Inc.
InventorsKlaus Dimmler, Alfred P. Gnadinger
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AssigneeCOVA Technologies, Inc.
InventorsKlaus Dimmler, Alfred P. Gnadinger
Estimating the term…
A method of storing and accessing two data bits in a single ferroelectric FET includes selectively polarizing two distinct ferroelectric regions in the same gate dielectric layer separated by a non-ferroelectric dielectric region. A first ferroelectric region is sandwiched between the substrate and the gate terminal in the region of the source and is polarized in one of two states to form a first data bit within the FET. A second ferroelectric region is sandwiched between the substrate and the gate terminal in the region of the drain and is polarized in one of two states to form a second data bit within the FET. Detection of the first data bit is accomplished by selectively applying a read bias to the FET terminals, a first current resulting when a first state is stored and a second current resulting when a second state is stored. The polarization of the second data bit is accomplished by reversing the source and drain voltages.
A non-volatile memory storage method comprising:
A non-volatile memory comprising a field effect transistor having a gate, drain, source, a first ferroelectric gate region, a second ferroelectric gate region and at least one buffer dielectric layer between the ferroelectric gate regions and a channel and/or between the ferroelectric gate regions and the gate, wherein the first and second ferroelectric gate regions are selectively polarized to first and second states without drawing a current between the source and the drain.
A non-volatile memory comprising a field effect transistor having a gate, drain, source, a first ferroelectric gate region, and a second ferroelectric gate region wherein the first and second ferroelectric gate regions are selectively polarized to first and second states without drawing a current between the source and the drain,
A non-volatile memory comprising a field effect transistor having a gate, drain, source, a first ferroelectric gate region, and a second ferroelectric gate region wherein the first and second ferroelectric gate regions are selectively polarized to first and second states without drawing a current between the source and the drain, wherein the ferroelectric gate regions are formed using MOCVD.
A non-volatile memory comprising a field effect transistor having a gate, drain, source, a first ferroelectric gate region, and a second ferroelectric gate region wherein the first and second ferroelectric gate regions are selectively polarized to first and second states without drawing a current between the source and the drain, wherein the ferroelectric gate regions are formed using ALD.
Dependencies are inferred from the claim text.