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US 6,888,733 B2Granted
Multiple chip system including a plurality of non-volatile semiconductor memory devices
AssigneeSamsung Electronics Co., Ltd.
InventorsCheol-Ung Jang, Young-Joon Choi
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Abstract
A multiple chip memory system capable of providing state information relating to each chip embedded therein. The multiple chip memory system includes a first chip enabled by a first chip selection signal, and informing of a self state by a first ready/busy signal; and a second chip enabled by a second chip selection signal, and informing of a self state by a second ready/busy signal.
Claims10
A semiconductor memory device, comprising:
- a first device to generate a first ready/busy signal, the first ready/busy signal indicating the first chip is busy;
- and
- a second device to generate a second ready/busy signal, the second ready/busy signal indicating the second chip is busy;
- where the first and second devices are in a single integrated circuit;
- where the first ready/busy signal is distinct from the second ready/busy signal;
- and
- where the first and second ready/busy signals are provided directly to a host from the semiconductor memory device.
4 more elements
A device, comprising:
- first chip means for generating a first status signal;
- and
- second chip means for generating a second status signal, the second status signal being distinct from the first status signals;
- where the first and second chip means are in a single integrated circuit;
- and
- where the first and second status signals are provided directly to a host from the semiconductor memory device.
3 more elements
Dependencies are inferred from the claim text.