FPGA peripheral routing with symmetric edge termination at FPGA boundaries
AssigneeSTMicroelectronics Pvt. Ltd.
InventorAnkur Bal
Life of this patent
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Abstract
An FPCA includes a scheme for peripheral routing that provides symmetrical routing across its entire area including the periphery by incorporating peripheral routing lines of equal length that are symmetrically deflected orthogonally. The symmetrical peripheral routing lines are connected to switch boxes and connection boxes at the periphery for maintaining constant routing channel width.
Claims15
A Field Programmable Gate Array (FPGA) providing symmetrical routing across its entire area including a periphery, comprising:
- peripheral routing lines of equal length that are symmetrically deflected orthogonally;
- and
- switch boxes and connection boxes positioned at the periphery and connected to the peripheral routing lines, for maintaining constant routing channel width.
A method for providing symmetrical routing across an entire area, including a periphery, of an FPGA, comprising the steps of:
- symmetrically deflecting peripheral routing lines of equal length orthogonally;
- and
- connecting switch boxes and connection boxes at the periphery, for maintaining constant routing channel width.
A field programmable gate array, comprising:
- an array of programmable logic boxes;
- a plurality of switch boxes positioned outside of the array and in a peripheral channel;
- and
- a plurality of peripheral routing lines positioned in the peripheral channel and connected to the switch boxes, each of the switch boxes being connected to respective first and second routing lines, of the plurality of routing lines, that symmetrically extend in opposite directions from each other.
Dependencies are inferred from the claim text.