Dynamically adjustable termination impedance control techniques

A method for providing dynamically adjustable on-chip termination impedance to a first input/output pin on an integrated circuit, the method comprising:

• controlling first current paths through first on-chip resistors that coupled together in parallel using first pass gates, each first pass gate being coupled in series with one of the first on-chip resistors;
• providing a second current path through the first on-chip resistors and a second on-chip resistor that is coupled in series with the first on-chip resistors by turning ON a second pass gate;
• providing a third current path through a third on-chip resistor that is coupled in parallel with the first and second on-chip resistors by turning ON a third pass gate, wherein the second and the third resistors are coupled to the first pin;
• sensing the on-chip termination impedance;
• and
• dynamically adjusting the on-chip termination impedance by changing states of the first pass gates.

An integrated circuit comprising a first dynamically adjustable on-chip impedance termination circuit, wherein the first impedance termination circuit comprises:

• means for coupling together first resistors in parallel in response to first control signals;
• means for providing a first current path through a second resistor coupled in series with the first resistors in response to a second control signal;
• and
• means for providing a second current path through a third resistor coupled in parallel with the first resistors and the second resistor in response to a third control signal, wherein the first, second, and third resistors provide termination impedance at a pin.