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US 6,888,258 B2Granted
Semiconductor device including copper interconnect line and bonding pad, and method of manufacturing the same
AssigneeRenesas Technology Corp.
InventorsTakeru Matsuoka, Noriaki Fujiki, Hiroki Takewaka
Life of this patent
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Abstract
A contact and a copper interconnect line as an uppermost interconnect layer are buried in an interlayer insulating film. A pad area including aluminum alloy (such as AlCu or AlSiCu) is buried in a predetermined area of the copper interconnect line. A gold wire is bonded to the pad area.
Claims12
A semiconductor device, comprising:
- a copper interconnect line buried in an interlayer insulating film provided on a semiconductor substrate;
- and
- a pad area connected to said copper interconnect line, wherein
- said pad area comprises:
- copper metal integrated with said copper interconnect line;
- and
- aluminum alloy at least partially buried in said copper metal and a bottom surface thereof contacts said interlayer insulating film through said copper metal.
4 more elements
A semiconductor device, comprising:
- a copper interconnect line buried in an interlayer insulating film provided on a semiconductor substrate;
- and
- a pad area connected to said copper interconnect line, wherein
- said pad area comprises:
- copper metal integrated with said copper interconnect line,
- aluminum alloy at least partially buried in said copper metal, and
- a compound layer provided at least on a surface of said aluminum alloy buried in said copper metal, said compound layer including titanium alloy, copper and aluminum.
4 more elements
A semiconductor device, comprising:
- a copper interconnect line buried in an interlayer insulating film provided on a semiconductor substrate;
- and
- a pad area connected to said copper interconnect line, wherein
- said pad area comprises:
- copper metal integrated with said copper interconnect line;
- and
- aluminum alloy contacting said copper metal, said aluminum alloy being at least partially buried not in said copper metal but in said interlayer insulating film.
4 more elements
A method of manufacturing a semiconductor device, comprising the steps of:
- (a) defining a trench in an interlayer insulating film to form an interconnect line and a pad area, said interlayer insulating film being provided on a semiconductor substrate;
- (b) depositing copper over said semiconductor substrate to the extent that said trench to form said pad area is not totally filled;
- (c) after said step (b), depositing titanium alloy over said semiconductor substrate to the extent that said trench to form said pad area is not totally filled;
- (d) after said step (c), depositing aluminum alloy over said semiconductor substrate, to completely fill said trench to form said pad area;
- (e) performing thermal processing to cause reaction between said titanium alloy, said copper and said aluminum alloy;
- and
- (f) removing said copper, said titanium alloy and said aluminum alloy while keeping said copper, said titanium alloy and said aluminum alloy in said trench to remain, to form said interconnect line and said pad area in said trench.
4 more elements
A method of manufacturing a semiconductor device, comprising the steps of:
- (a) forming a copper interconnect line by a damascene process to be buried in an interlayer insulating film provided on a semiconductor substrate;
- (b) after said step (a), defining an opening in said interlayer insulating film in such a manner that said opening is in contact with said buried interconnect line;
- (c) depositing aluminum alloy to completely fill said opening;
- and
- (d) removing said aluminum alloy while keeping said aluminum alloy at least in said opening to remain, to form a pad area including said aluminum alloy.
2 more elements
Dependencies are inferred from the claim text.