Semiconductor power device with shear stress compensation

A semiconductor device comprising:

• a first interconnect and a second interconnect overlying a semiconductor device substrate;
• a passivation layer over the first interconnect and the second interconnect and laterally adjacent the first interconnect and the second interconnect, the passivation layer having openings to expose a predetermined portion of each of the first interconnect and the second interconnect;
• a continuous conductive layer over the passivation layer and the first interconnect and the second interconnect to make electrical contact with the first interconnect and the second interconnect and electrically connect the first interconnect and the second interconnect;
• and
• a first conductive structure and a second conductive structure on the continuous conductive layer, wherein the first conductive structure is physically spaced apart from the second conductive structure and, wherein the first conductive structure is electrically coupled to the second conductive structure by way of the continuous conductive layer, wherein a combination of the first conductive structure, the second conductive structure, and the continuous conductive layer defines a conductive feature that electrically couples the first interconnect and the second interconnect.