Straddled gate FDSOI device

A straddled gate device formed on a semiconductor-on-insulator (SOI) substrate having active regions defined by isolation regions and an insulator layer, the device comprising:

• a first gate defining a first channel region interposed between a source and a drain formed within the active region of the SOI substrate;
• a second gate straddling the first gate defining second channel regions interposed between the first channel region and the source and the drain;
• a contact connecting the first gate with the second gate;
• a first dielectric layer separating the first gate from the SOI substrate, the first dielectric layer having a relative permittivity greater than SiO2;
• a second dielectric layer separating the second gate from the SOI substrate, the second dielectric layer having a relative permittivity less than the first dielectric layer;
• and
• a liner interposed between the first gate and the second gate;
• wherein the liner includes a segment separating the second gate and the SOI substrate.