Plasma processing method and plasma processing apparatus

#1. Field of the Invention

#In general, the present invention relates to a plasma processing method and a plasma processing apparatus. More particularly, the present invention relates to a plasma processing method and a plasma processing apparatus that are suitable for a process to etch a substrate such as a semiconductor wafer by using plasma.

#2. Related Background Art

#FIG. 1 is a diagram showing the whole configuration of a typical plasma processing apparatus provided by the present invention;

#FIG. 2 is a cross-sectional diagram showing a detailed configuration of an etching unit employed in the plasma processing apparatus shown in FIG. 1;

#FIG. 3 is a diagram showing relations between etching characteristics (consisting of a CD gain, a select ratio and a uniformity) and the on-off duty ratio of a high-frequency voltage applied to a sample in an etching process carried out by the etching unit shown in FIG. 2;

#Some preferred embodiments of the present invention are explained by referring to the diagrams as follows.

#First of all, a first embodiment of the present invention is explained by referring to FIGS. 1 to 6. In the first embodiment, a wafer fabricated-line dimension in an etching process is measured for each wafer or each plurality of wafers and an etching condition is changed in accordance with the measured value of the wafer fabricated-line dimension. In this case, an etching condition is changed by varying a duty ratio of on-off modulation carried out on a high-frequency voltage applied to a wafer, which is used as a substrate, where the duty ratio is defined as a ratio of an ON time to a period of the on-off modulation. As a result, variations in fabricated-line dimension can be suppressed.

#FIG. 1 is a diagram showing the whole configuration of a plasma processing apparatus for implementing a plasma processing method provided by the first embodiment of the present invention. In the first embodiment, a vacuum processing apparatus 1 comprises 4 plasma processing chambers 2a to 2d, a vacuum carrier chamber 3 and lock chambers 4a and 4b. The plasma processing chambers 2a to 2b as well as the lock chambers 4a and 4b are provided at locations surrounding the vacuum carrier chamber 3. Typically, the plasma processing chambers 2a and 2b are each an etching chamber while the plasma processing chambers 2c and 2d are each an ashing chamber. On the side of the lock chambers 4a and 4b of the vacuum processing apparatus 1, there is provided a carrier apparatus 5 having a carrier robot 6. The carrier apparatus 5 is sandwiched between the lock chambers 4a and 4b and a cassette base 7 on which a plurality of cassettes 8 can be placed. In addition to the vacuum processing apparatus 1, an aligner 11 and an inspection apparatus 9 are provided at locations surrounding the carrier apparatus 5. A result of a measurement carried out by the inspection apparatus 9 is supplied to a control apparatus 10 to be used in an etching-condition adjustment unit 100 employed in the control apparatus 10 as a basis for adjusting a processing condition of wafers in the plasma processing chambers 2a and 2b. It is to be noted that the control apparatus 10 is based on a computer comprising typically a CPU, a memory, a program, an external storage device and an input/output unit. The etching-condition adjustment unit 100 is implemented by elements including a program and a storage device. The program implements run-to-run control for changing quantities such as a duty ratio of a high-frequency bias for each sample or each lot unit on the basis of a measurement result supplied to the etching-condition adjustment unit 100. On the other hand, the storage device is used for storing various kinds of data required in execution of the run-to-run control.