Method of forming a MISFET having a schottky junctioned silicide
AssigneeKabushiki Kaisha Toshiba
InventorsAtsushi Yagishita, Kouji Matsuo
Life of this patent
Estimating the term…
Loading patent…
AssigneeKabushiki Kaisha Toshiba
InventorsAtsushi Yagishita, Kouji Matsuo
Estimating the term…
There is disclosed a semiconductor device in which a device isolating insulating film is formed in a periphery of a device region of a semiconductor silicon substrate device region. A side wall insulating film formed of a silicon nitride film is formed to cover the periphery of a channel region on the silicon substrate. A Ta2O5 film, and a metal gate electrode are formed inside a trench whose side wall is formed of the side wall insulating film. An interlayer insulating film is formed on the device isolating insulating film. A Schottky source/drain formed of silicide is formed on the silicon substrate in a bottom portion of the trench whose side wall is formed of the side wall insulating film and interlayer insulating film. A source/drain electrode is formed on the Schottky source/drain.
A method for manufacturing a semiconductor device comprising the steps of:
A method for manufacturing a semiconductor device comprising the steps of:
A method for manufacturing a semiconductor device comprising the steps of;
A method for manufacturing a semiconductor device comprising the steps of:
Dependencies are inferred from the claim text.