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US 6,883,894 B2Granted
Printhead with looped gate transistor structures
AssigneeHewlett-Packard Development Company, L.P.
InventorsFrank R. Bryant, Joseph M. Torgerson, Angela White Bakkom
Life of this patent
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Abstract
An integrated circuit is formed on a substrate. The integrated circuit includes a transistor formed in the substrate. The transistor has a gate that forms at least one closed-loop. The integrated circuit also includes an ejection element that is coupled to the transistor wherein the ejection element is disposed over the substrate without an intervening field oxide layer.
Claims18
An integrated circuit for a printhead, comprising:
- a substrate field oxide layer;
- a set of transistors formed in the substrate wherein the gate of each of the set of transistors forms at least one closed loop;
- and
- an ejection element coupled to at least one of the set of transistors wherein the ejection element is disposed over the substrate with an intervening dielectric layer.
1 more element
An integrated circuit for a printhead comprising:
- a substrate;
- a set of transistors formed in the substrate wherein the gate of each of the set of transistors form at least one closed loop;
- an ejection element coupled to at least one of the set of transistors wherein the ejection element is disposed over the substrate with an intervening layer which is not field oxide;
- and
- an orifice layer defining a nozzle fluidically coupled to the ejection element and wherein the nozzle is further fluidically coupled to a fluid channel to deliver fluid to the ejection element.
2 more elements
An integrated circuit for a printhead comprising:
- a printhead of;
- an integrated circuit;
- a substrate;
- a set of transistors formed in the substrate wherein the gate of each of the set of transistors forms at least one closed loop;
- an ejection element coupled to at least one of the set of transistors wherein the ejection element is disposed over the substrate with an intervening layer which is not field oxide;
- an orifice layer defining a nozzle fluidically coupled to the ejection element and wherein the nozzle is further fluidically coupled to a fluid channel to deliver fluid to the ejection element;
- a body having a fluid reservoir fluidically coupled to the fluid channel of the printhead;
- and
- a pressure regulator for maintaining a negative pressure relative to the ambient air pressure to prevent the fluid within the printhead from drooling out of the nozzle without activation of the ejection element.
6 more elements
An integrated circuit for a printhead comprising:
- a fluid cartridge;
- a printhead;
- an integrated circuit;
- a substrate;
- a set of transistors formed in the substrate wherein the gate of each of the set of transistors forms at least one closed loop;
- an ejection element coupled to at least one of the set of transistors wherein the ejection element is disposed ova the substrate with an intervening layer which is not field oxide;
- an orifice layer defining a nozzle fluidically coupled to the ejection clement and wherein the nozzle is further fluidically coupled to a fluid channel to deliver fluid to the ejection element;
- a body having a fluid reservoir fluidically coupled to the fluid channel o(the printhead;
- and a pressure regulator for maintaining a negative pressure relative to the ambient air pressure to prevent the fluid within the printhead from drooling out of the nozzle without activation of the ejection element;
- and
- a transport mechanism for moving the fluid cartridge in at least one direction with respect to a recording media.
8 more elements
A printhead having a set of transistors integrated thereon, the printhead comprising:
- a substrate field oxide layer;
- each transistor positioned on the substrate, the transistors comprising a source region, a drain region, and a gate positioned between the source region and the drain region, the gate forming a closed loop and comprising,
- a layer of silicon dioxide not of field oxide disposed over the substrate, and
- a layer of polycrystalline silicon directly on the layer of silicon dioxide;
- a layer of dielectric material covering the substrate having a plurality of openings there through, the openings providing access the source region, the drain region, and the gate of the transistor;
- a layer of electrically resistive material positioned on the layer of dielectric material and in direct electrical contact with the source region, the drain region, and the gate through the openings;
- a layer of conductive material affixed to a portion of the layer of electrically resistive material in order to form a multi-layer structure, the layer of electrically resistive material having at least one uncovered section capable of functioning as an ejection element disposed over the layer of dielectric material and the substrate, the layer of electrically resistive material being covered with the layer of conductive material at the source region, the drain region and the gate of the transistor;
- a portion of protective material positioned on the ejection element;
- and
- an orifice layer having at least one nozzle, the orifice layer secured to the portion of protective material having a section thereof removed directly beneath the nozzle in order to form a fluid well in order to impart energy from the ejection element.
7 more elements
Dependencies are inferred from the claim text.