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US 6,882,238 B2Granted
Method and apparatus for detecting on-die voltage variations
AssigneeIntel Corporation
InventorsNasser A. Kurd, Javed S. Barkatullah
Life of this patent
Estimating the term…
Abstract
On-die voltage and/or frequency detectors. For one aspect, an adaptive frequency clock generation circuit includes a droop detector to detect a supply voltage level and to cause the frequency of an on-die clock signal to be adjusted accordingly.
Claims17
An apparatus comprising:
- a detector to receive a first substantially fixed voltage from one of a bandgap and an analog supply and to detect a level of a second voltage, the detector to output a code signal responsive to the detected level of the second voltage, wherein the detector comprises a voltage divider to receive the first substantially fixed voltage from a substantially fixed power supply at a first terminal and to provide at least first and second substantially fixed, divided reference voltages and wherein the detector further comprises an enable transistor coupled to a second terminal of the voltage divider, the enable transistor being adjustable to adjust the current through the voltage divider;
- and
- a control circuit to determine a frequency of a clock signal in response to the code signal.
An apparatus comprising:
- a detector to receive a first substantially fixed voltage from one of a bandgap and an analog supply and to detect a level of a second voltage, the detector to output a code signal responsive to the detected level of the second voltage, wherein the detector comprises
- a first delay path to receive the first substantially fixed voltage from a first power supply and to provide a first reference delay,
- a variable delay path to receive the second voltage to be detected, and
- at least first and second phase detectors to output the code signal in response to comparing at least first and second delays along the variable delay path with the first reference delay;
- and
- a control circuit to determine a frequency of a clock signal in response to the code signal.
3 more elements
An integrated circuit chip comprising:
- a first clock generator to generate a first clock signal having a first frequency;
- at least a second clock generator to generate a second clock signal having a second frequency;
- a droop detector to receive a substantially fixed first supply voltage and to detect a level of one of a second supply voltage or a temperature, the droop detector to output a frequency code in response to the detected level;
- and
- a control circuit to receive the frequency code and to selectively output one of the at least first and second clock signals based on the frequency code.
2 more elements
A method comprising:
- detecting one of a voltage and temperature level using a circuit that receives a substantially fixed first supply voltage level from one of a bandgap and an analog supply,
- providing a code based on the detected level, and
- determining an output clock frequency in response to the code,
- wherein detecting comprises comparing a substantially fixed reference delay to at least a first delay that varies in response to the voltage.
1 more element
A method comprising:
- detecting one of a voltage and temperature level using a circuit that receives a substantially fixed first supply voltage level from one of a bandgap and an analog supply,
- providing a code based on the detected level, and
- determining an output clock frequency in response to the code,
- wherein detecting comprises
- generating an oscillating signal having a frequency that varies in response to variations in the voltage,
- providing a voltage signal having a voltage level that is resistive to the frequency of the oscillating signal, and
- providing the code based on the voltage level.
4 more elements
Dependencies are inferred from the claim text.