Memory device
AssigneeHewlett-Packard Development Company, L.P.
InventorsKenneth Kay Smith, Andrew VanBrocklin, Peter Fricke, Frederick A. Perner, Kenneth James Eldredge
Life of this patent
Estimating the term…
Abstract
Embodiments of the present invention provide a memory device. In one embodiment, the memory device comprises an array of memory cells configured to provide resistive states, a read circuit configured to sense the resistive states and a resistor. The resistor is configured to provide a resistance to the read circuit that is configured to select the resistor and sense the resistance to test the read circuit.
Claims33
A memory device, comprising:
- an array of memory cells configured to provide resistive states;
- a read circuit configured to sense the resistive states;
- and
- a resistor configured to provide a resistance to the read circuit that is configured to select the resistor and sense the resistance to test the read circuit.
A memory device, comprising:
- a memory cell configured to provide a first resistive state and a second resistive state;
- means for sensing the first resistive state and the second resistive state;
- means for providing a first resistance to the means for sensing;
- and
- means for providing a second resistance to the means for sensing, wherein the means for providing a first resistance corresponds to the first resistive state and the means for providing a second resistance corresponds to the second resistive state.
A method of testing a magnetic memory device comprising an array of magnetic memory cells, the method comprising:
- providing a read circuit in the magnetic memory device;
- providing a resistor that differs structurally from magnetic memory cells in the array of magnetic memory cells;
- sensing the resistance through the resistor with the read circuit to obtain a result;
- and
- comparing the result to expected results.
Dependencies are inferred from the claim text.