Multi-mode bias circuit for power amplifiers

Abstract

According to an exemplary embodiment, a circuit arrangement includes a multi-mode bias circuit having a control voltage input, a mode control input for selecting between a linear mode and a saturation mode, and a bias output. The circuit arrangement further includes an amplifier having a bias input connected to the bias output of the multi-mode bias circuit, the amplifier having an RF input and an RF output. The multi-mode bias circuit causes the amplifier RF output power to be proportional to the RF input power when the mode control input selects the linear mode. Conversely, the multi-mode bias circuit causes the amplifier RF output power to be determined by the voltage at the control voltage input when the mode control input selects the saturation mode.

Dependencies are inferred from the claim text.