Method for forming multiple fins in a semiconductor device
AssigneeAdvanced Micro Devices, Inc.
InventorsBin Yu, Judy Xilin An, Cyrus E. Tabery
Life of this patent
Estimating the term…
Abstract
A method of forming multiple fins in a semiconductor device includes forming a structure having an upper surface and side surfaces on the semiconductor device. The semiconductor device includes a conductive layer located below the structure. The method also includes forming spacers adjacent the structure and selectively etching the spacers and the conductive layer to form the fins. The fins may be used in a FinFET device.
Claims20
A method of forming a plurality of fins in a FinFET device, comprising:
- forming a dielectric layer on a silicon on insulator (SOI) wafer, the SOI wafer comprising a conductive layer disposed on an insulating layer, the conductive layer being used to form the plurality of fins;
- forming a structure on a portion of the dielectric layer, the structure including an upper surface and side surfaces;
- forming a first plurality of spacers adjacent the side surfaces of the structure;
- forming a second plurality of spacers adjacent the first plurality of spacers;
- planarizing the structure and the first and second plurality of spacers to expose an upper surface of each of the first and second plurality of spacers;
- removing the structure, the second plurality of spacers and a portion of the dielectric layer located below the second plurality of spacers, wherein a remaining portion of the dielectric layer forms a plurality of dielectric structures located below the first plurality of spacers;
- and
- removing the first plurality of spacers and a portion of the conductive layer not located below the plurality of dielectric structures to form the plurality of fins, wherein the removing the first plurality of spacers and the portion of the conductive layer not located below the plurality of dielectric structures is performed subsequent to removing the structure, the second plurality of spacers and the portion of the dielectric layer located below the second plurality of spacers.
A method of manufacturing a semiconductor device, comprising:
- depositing a dielectric layer over a conductive layer;
- forming a first structure over the dielectric layer, the first structure having a substantially rectangular cross-sectional shape;
- forming a plurality of first spacers on side surfaces of the first structure;
- etching the first structure and the dielectric layer, the etching resulting in a plurality of dielectric structures located below the plurality of first spacers;
- and
- etching the plurality of first spacers and the conductive layer after etching the first structure and the dielectric layer, wherein the dielectric structures act as a mask to prevent a portion of the conductive layer from being etched and an un-etched portion of the conductive layer forms a plurality of fins.
A method of forming a plurality of structures in a semiconductor device, comprising:
- forming a first structure over a conductive layer, the first structure having an upper surface and side surfaces;
- forming a first plurality of spacers adjacent the side surfaces of the first structure;
- forming a second plurality of spacers adjacent the first plurality of spacers;
- etching the first plurality of spacers and the conductive layer, wherein the first structure and the second plurality of spacers act as a mask to prevent a portion of the conductive layer from being etched and an un-etched portion of the conductive layer forms the plurality of structures;
- and
- removing the first structure and the second plurality of spacers after etching the first plurality of spacers and the conductive layer.
Dependencies are inferred from the claim text.