Method and apparatus for performing extraction using machine learning
AssigneeCadence Design Systems, Inc.
InventorsSteven Teig, Arindam Chatterjee
Life of this patent
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AssigneeCadence Design Systems, Inc.
InventorsSteven Teig, Arindam Chatterjee
Estimating the term…
A system for using machine-learning to create a model for performing integrated circuit layout extraction is disclosed. The system of the present invention has two main phases: model creation and model application. The model creation phase comprises creating one or more extraction models using machine-learning techniques. First, a complex extraction problem is decomposed into smaller simpler extraction problems. Then, each smaller extraction problem is then analyzed to identify a set of physical parameters that fully define the smaller extraction problem. Next, models are created using machine learning techniques for all of the smaller simpler extraction problems. The machine learning is performed by first creating training data sets composed of the identified parameters from typical examples of the smaller extraction problem and the answers to those example extraction problems as solved using a highly accurate physics-based field solver. The training sets are then used to train the models. In one embodiment, neural networks are used to model the extraction problems. Bayesian inference is employed by one embodiment in order to train the neural network models. Bayesian inference may be implemented with normal Monte Carlo techniques or Hybrid Monte Carlo techniques. After the creation of a set of models for each of the smaller simpler extraction problems, the machine-learning based models may be used for extraction.
A method of extracting electrical characteristics from an integrated circuit layout, said method comprising:
A computer readable medium, said computer readable medium comprising an arranged set of computer instructions for:
Dependencies are inferred from the claim text.