US 6,857,110 B1 · Design methodology for merging programmable logic into a custom IC

Abstract

A programmable logic core (PLC) can be integrated into custom ICs such as ASICs and SOCs using a unique design methodology. For example, the methodology can incorporate the PLC into the entire ASIC design process from chip level RTL to final tape-out and resolve issues ranging from RTL guidelines through to sub-micron signal integrity. The post-manufacture programming flow is considered up-front during the ASIC flow and tools ensure successful programming in the field environment for the lifetime of the product. An example PLC architecture for integration into a custom IC includes a Multi Scale Array (MSA) that consists of an array of configurable ALUs and is implemented as a hard macro, an Application Circuit Interface (ACI) that provides signal interface between the MSA and application circuitry and is included in the same hard macro, and a PLC Adapter that initiates and loads the PLC configuration data and interfaces that is implemented as a soft-macro.

Claims13

Dependent claims

An integrated circuit, comprising:

a programmable logic core that supports:
an idle state that is entered after an assertion of a signal that power is good;
a built in self test state for testing the programmable logic core, the built in self test state is entered from the idle state upon receipt of a test command;
a configuration state for implementing a configuration process, the configuration state supports entry from the idle state and from the built in self test state after receipt of a configuration clock signal;
and
an operate state that controls operations of arithmetic logic units, and is entered after completion of the configuration process;
and
application specific circuitry, the application specific circuitry being designed in accordance with a sign-off design.

5 more elements

Dependencies are inferred from the claim text.

Design methodology for merging programmable logic into a custom IC

Life of this patent

Design methodology for merging programmable logic into a custom IC

Life of this patent

Abstract

Claims13