Semiconductor integrated circuit device capable of self-testing internal power supply currents provided to internal circuits integrated on chip
AssigneeRenesas Technology Corp.
InventorTsukasa Ooishi
Life of this patent
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Abstract
The semiconductor integrated circuit device includes an internal power supply circuit placed between a prescribed one of a plurality of internal circuits and a power supply interconnection for converting a level of an external power supply potential to supply an internal power supply potential to the prescribed internal circuit, and a control circuit for conducting a self-test of the semiconductor integrated circuit device. The control circuit detects a current amount being supplied from the internal power supply circuit to the prescribed internal circuit. The detected result is externally output via a data input/output unit.
Claims28
A semiconductor integrated circuit device formed on a main surface of a semiconductor substrate, comprising:
- a plurality of internal circuits formed on said main surface;
- a first power supply interconnection for supplying a first external power supply potential externally provided to said semiconductor integrated circuit device to said plurality of internal circuits;
- a second power supply interconnection for supplying a second external power supply potential externally provided to said semiconductor integrated circuit device to said plurality of internal circuits;
- an internal power supply circuit, provided between a prescribed one of said plurality of internal circuits and said second power supply interconnection, for converting a level of said second external power supply potential to supply an internal power supply potential to said prescribed internal circuit;
- a testing circuit for conducting a self-test of said semiconductor integrated circuit device,
- said testing circuit including a measuring circuit for detecting a current amount being supplied from said internal power supply circuit to said prescribed internal circuit;
- and
- a data output circuit for outputting said detected result outside said semiconductor integrated circuit device.
A semiconductor integrated circuit device formed on a main surface of a semiconductor substrate, comprising:
- a plurality of internal circuits formed on said main surface;
- a first power supply interconnection for supplying a first external power supply potential externally provided to said semiconductor integrated circuit device to said plurality of internal circuits;
- a second power supply interconnection for supplying a second external power supply potential externally provided to said semiconductor integrated circuit device to said plurality of internal circuits;
- an internal power supply control circuit provided between a prescribed one of said plurality of internal circuits and said second power supply interconnection for controlling supply of an internal power supply potential to said prescribed internal circuit;
- a testing circuit for conducting a self-test of said semiconductor integrated circuit device,
- said testing circuit including a measuring circuit for detecting a current amount being provided from said second power supply interconnection to said prescribed internal circuit;
- and
- a data output circuit for outputting said detected result outside said semiconductor integrated circuit device.
A semiconductor integrated circuit device formed on a main surface of a semiconductor substrate, comprising:
- a plurality of internal circuits formed on said main surface;
- a first power supply interconnection for supplying a first external power supply potential externally provided to said semiconductor integrated circuit device to said plurality of internal circuits;
- a second power supply interconnection for supplying a second external power supply potential externally provided to said semiconductor integrated circuit device to said plurality of internal circuits;
- an internal power supply control circuit provided between a prescribed one of said plurality of internal circuits and said second power supply interconnection for controlling supply of an internal power supply potential to said prescribed internal circuit;
- a testing circuit for conducting a self-test of said semiconductor integrated circuit device,
- said testing circuit including a measuring circuit for detecting a current amount being supplied from said second power supply interconnection to said prescribed internal circuit;
- and
- a shutdown circuit suspending potential supply from said internal power supply control circuit to a power supply node of said prescribed internal circuit according to said detected result.
A testing circuit for testing a plurality of semiconductor integrated circuit devices in a batch, comprising:
- a signal interconnection commonly provided for said plurality of semiconductor integrated circuit devices for sending signals to and receiving signals from said plurality of semiconductor integrated circuit devices;
- a first power supply interconnection commonly provided for said plurality of semiconductor integrated circuit devices for supplying a first external power supply potential;
- a second power supply interconnection commonly provided for said plurality of semiconductor integrated circuit devices for supplying a second external power supply potential;
- a power supply control circuit provided between each said semiconductor integrated circuit device and said second power supply interconnection for controlling the supply of said second power supply potential to said relevant semiconductor integrated circuit device;
- a testing circuit provided for each said semiconductor integrated circuit device for detecting a current amount being supplied from said second power supply interconnection to said relevant semiconductor integrated circuit device;
- and
- a shutdown circuit provided for each said semiconductor integrated circuit device for suspending potential supply from said power supply control circuit to said relevant semiconductor integrated circuit device according to a detected result of said testing circuit.
Dependencies are inferred from the claim text.