Methods and apparatus for bus mastering and arbitration
AssigneeAltera Corporation
InventorsJeffrey Orion Pritchard, Tim Allen
Life of this patent
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Abstract
Methods and apparatus are provided for providing a first master component with access to a first slave component while a second master component is accessing a second slave component in a system. The system may include a processor core and peripherals implemented on an integrated circuit. A slave side arbitrator corresponding to a single slave component and coupled to multiple master components can be used to provide a master component access to a slave component.
Claims36
A system having multiple master components and multiple slave components, the system comprising:
- a first master component;
- a second master component;
- and
- a first slave side arbitrator associated with a first slave component, the first slave side arbitrator coupling the first and second master components to the first slave component, wherein the first slave side arbitrator is operable to determine that the first master component has access to the first slave component and maintain the access after the slave component issues a split instruction.
A programmable chip having an embedded processor core, the programmable chip comprising:
- a first master component;
- a second master component, wherein the second master component is a processor core;
- a slave side arbitrator coupling the first and second master components to a first slave component;
- a second slave component coupled to the second master;
- wherein the slave side arbitrator is associated with a master locking indicator providing the first master component access to the first slave component while the second master component has access to the second slave component.
A method for arbitration in a system having multiple master components, the method comprising:
- providing a first master with access to a first slave, wherein the first master and the first slave are components of a processing system;
- disregarding a split instruction associated with the first slave;
- providing a second master with access to a second slave while the first master is accessing the first slave, wherein the second master and the second slave share a single address space with the first master and the first slave in the processing system.
An apparatus for multiple mastering, the apparatus comprising:
- means for providing a first master with access to a first slave, wherein the first master and the first slave are components of a processing system;
- means for ignoring a split instruction associated with the first slave;
- means for providing a second master with access to a second slave while the first master is accessing the first slave, wherein the second master and the second slave share a single address space with the first master and the first slave in the processing system.
Dependencies are inferred from the claim text.