I/O node for a computer system including an integrated graphics engine and an integrated I/O hub

A computer system comprising:

• a processing node including one or more processors;
• a link of a packet interface coupled to said processing node;
• an input/output node coupled to said link, said input/output node including:
• a transceiver unit implemented on an integrated circuit chip, wherein said transceiver unit is configured to receive and transmit packets on a point-to-point link of a packet interface;
• a graphics engine implemented on said integrated circuit chip, wherein said graphics engine is coupled to receive graphics packets received by said transceiver unit and is configured to render digital image information in response to receiving said graphics packets;
• and
• an I/O hub implemented on said integrated circuit chip, wherein said I/O hub is coupled to receive I/O packets corresponding to packets received by said transceiver unit and is configured to initiate bus cycles corresponding to said I/O packets upon a peripheral bus.

An input/output node for a computer system, said input/output node comprising:

• a transceiver unit implemented on an integrated circuit chip, wherein said transceiver unit is configured to receive and transmit packets on a point-to-point link of a packet interface;
• a graphics bus interface implemented on said integrated circuit chip, wherein said graphics bus interface is coupled to receive packets including graphics commands and to translate said packets into graphics commands suitable for transmission upon a graphics bus;
• a graphics engine implemented on said integrated circuit chip and coupled to said graphics bus, wherein said graphics engine is coupled to receive said graphics commands via said graphics bus and is configured to render digital image information in response to receiving said graphics commands;
• and
• an I/O hub implemented on said integrated circuit chip, wherein said I/O hub is coupled to receive I/O packets corresponding to packets received by said transceiver unit and is configured to initiate bus cycles corresponding to said I/O packets upon a peripheral bus.