Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure

A method for erasing memory cells in an array of memory cells, comprising;

• providing a multiple of multibit data signals from a controller, wherein the multiple of multibit data signals includes a first multibit data signal, wherein the first multibit data signal describes at least one erase block to be erased;
• and
• predecoding to produce a predecoded signal from one of the multiple of the multibit data signals from the controller, wherein the one of the multiple of the multibit data signals defines within the same one multibit sianal an arbitrary number and combination of multiple blocks to be erased.

A method for erasing memory cells in an array of memory cells, comprising:

• providing a multiple of multibit data signals from a controller, wherein the multiple of multibit data signals includes a second multibit data signal, wherein the second multibit data signal describes at least one main block to be erased;
• and
• predecoding to produce a predecoded signal from one of the multiple of the multibit data signals from the controller, wherein the one of the multiple of the multibit data signals defines within the same one multibit signal an arbitrary number and combination of multiple blocks to be erased.

A method for erasing memory cells in an array of nonvolatile memory cells, comprising:

• providing a multiple of multibit data signals from a controller;
• and
• predecoding to produce a predecoded signal from one of the multiple of the multibit data signals from the controller, wherein the one of the multiple of the multibit data signals defines within the same one multibit signal an arbitrary number and combination of multiple blocks to be erased.

A method for erasing memory cells in an array of memory cells, comprising:

• storing a multiple of multibit data signals from a controller;
• and
• predecoding to produce a predecoded signal from one of the stored multiple of the multibit data signals, wherein the one of the multiple of the multibit data signals defines within the same one multibit signal an arbitrary number and combination of multiple blocks to be erased.

A method for erasing memory cells in an array of memory cells, comprising:

• receiving from an external interface a multiple of multibit data signals;
• predecoding directly, without intermediate storage, one of the received multiple of the multibit data signals, wherein the one of the multiple of the multibit data signals defines multiple blocks to be erased.