5 Volt tolerant IO scheme using low-voltage devices
AssigneeBroadcom Corporation
InventorsKent Oertle, Robert Elio, Duncan McFarland, Darrin Benzer
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Abstract
Systems and methods are disclosed for operating a core circuitry of an integrated circuit at a lower voltage than the coupled IO circuitry using a tolerant circuit. In one embodiment includes a voltage tolerant circuit comprising a voltage detect module adapted to detect when a voltage is sufficient to switch bias conditions without violating maximum transistor operating conditions and a comparator adapted to detect when a PAD voltage is greater than an IO power supply voltage.
Claims56
A voltage tolerant circuit comprising:
- a voltage detect module adapted to detect when a voltage is sufficient to switch bias conditions without violating maximum transistor operating conditions;
- a comparator adapted to detect when a PAD voltage is greater than an IO power supply voltage;
- and
- a switching transistor device adapted to switch between an intermediate power voltage and an IO power voltage.
A voltage tolerant circuit comprising:
- a voltage detect module adapted to detect when a voltage is sufficient to switch bias conditions without violating maximum transistor operating conditions;
- a comparator adapted to detect when a PAD voltage is greater than an IO power supply voltage;
- a tri-state module adapted to ensure that a PMOS transistor device will not turn on when said pad voltage exceeds said IO power supply voltage;
- and
- an overstress module adapted to prevent overstress of at least one device in a comparator module.
A voltage tolerant circuit comprising:
- a voltage detect module adapted to detect when a voltage is sufficient to switch bias conditions without violating maximum transistor operating conditions;
- a comparator adapted to detect when a PAD voltage is greater than an IO power supply voltage;
- and
- a transistor device adapted to decouple said PAD voltage from at least one device in said comparator when said PAD voltage is less than a predetermined voltage.
A voltage tolerant circuit comprising:
- a voltage detect module adapted to detect when a voltage is sufficient to switch bias conditions without violating maximum transistor operating conditions;
- a comparator adapted to detect when a PAD voltage is greater than an IO power supply voltage;
- and
- an overstress module comprising three NMOS transistor devices.
Dependencies are inferred from the claim text.