SRAM cell with well contacts and P+ diffusion crossing to ground or N+ diffusion crossing to VDD

A method of fabricating a SRAM cell comprising:

• cross coupling pnp pull-up devices P1, P2, and npn pull-down devices N1, N2, with the P1, P2 devices being connected to a power supply VDD;
• coupling a first passgate between a first bitline and the junction of devices P1 and N1, and coupling its gate to a wordline;
• coupling a second passgate between a second bitline and the junction of devices P2 and N2, and coupling its gate to the wordline;
• and
• coupling the N1, N2 devices through a P+ diffusion region to a ground.

A SRAM cell comprising:

• cross coupled pnp pull-up devices P1, P2, and npn pull-down devices N1, N2, with the N1, N2 devices being connected to a ground;
• a first passgate coupled between a first bitline and the junction of devices P1 and N1, with its gate coupled to a wordline;
• a second passgate coupled between a second bitline and the junction of devices P2 and N2, with its gate coupled to the wordline;
• and
• wherein the P1, P2 devices are coupled through a N+ diffusion region to a power supply VDD.

A method of fabricating a SRAM cell comprising:

• cross coupling pnp pull-up devices P1, P2, and npn pull-down devices N1, N2, with the P1, P2 devices being connected to the power supply VDD;
• coupling a first passgate between a first bitline and the junction of devices P1 and N1, and coupling its gate to a wordline;
• coupling a second passgate between a second bitline and the junction of devices P2 and N2, and coupling its gate to the wordline;
• and
• coupling the P1, P2 devices through a N+ diffusion region to a power supply VDD.